SAN FRANCISCO—Xilinx Inc. this week announced the availability of what it called the industry's first IBIS-AMI models for FPGA transceivers, saying they will enable designers to reduce simulation time from hours to minutes.

According to Xilinx (San Jose, Calif.), conventional signal integrity and timing analysis technologies such as HSPICE won't work for the multi-gibabit serial links that communications, networking and consumer electronics products are using to replace high-speed parallel interfaces.

The IBIS-AMI (I/O Buffer Information Specification - Algorithmic Modeling Interface) modeling specification enables standardized, interoperable simulation of serdes PHYs at high levels of simulation performance and accuracy, Xilinx said.

Xilinx and Signal Integrity Software Inc. (SiSoft) plan to hold a free webinar on Thursday (Nov. 12 ) to outline the advantages of using IBIS-AMI models for transceiver simulation, Xilinx said. Users can sign up for the webinar through Xilinx' website.

The Xilinx IBIS-AMI models can also be downloaded through the company's website here.