Xilinx (San Jose, Calif.) said the qualification is the result of close work between engineering teams from both companies to further enhance yield, reliability and cycle time. The full qualification of the Virtex-6 family signifies the transition to 40-nm volume production following UMC's first shipments of the devices in March 2009, Xilinx said.

Xilinx has been using UMC for foundry work for about 15 years. Last week an analyst with Broadpoint Amtech said Xilinx Inc. is set to use Taiwan Semiconductor Manufacturing Co. Ltd. for foundry services at the 28-nm node, presumably at the expense of UMC. Xilinx has declined to comment on the speculation.

"We highly value the ongoing execution of our long-time manufacturing partner UMC," said Xilinx CEO Moshe Gavrielov, in a statement.

Built using third-generation Xilinx ASMBL architecture, the Virtex-6 FPGA family delivers 15 percent higher performance and 15 percent lower power consumption compared to competitive 40-nm FPGA offerings, according to Xilinx. The devices operate on a 1.0v core voltage with an available 0.9v low-power option and are supported by a new generation of development tools delivered by ISE Design Suite 11 and a library of IP already available for the 65-nm Virtex-5 FPGA family to ensure productive development and design migration, Xilinx said.

UMC's 45/40-nm logic process utilizes immersion lithography for its 12 critical layers and incorporates the latest technology advancements such as ultra-shallow junction, embedded silicon- germanium and mobility enhancement techniques, and ultra low-k dielectrics, according to the company. Several customers have 45/40-nm products being manufactured at UMC, with thousands of wafers having already been shipped, UMC (Hsinchu, Taiwan) said.