Tabula (Santa Clara, Calif.) has said its Spacetime hardware is re-used multiple times per by the dynamic reconfiguration of logic, memory, and interconnect at multi-gigahertz rates. This approach is similar to that Silicon Basis Ltd. (Bristol, England).

Tabula said it is working on a family of products based on the Spacetime, resource reuse architecture but did not state when the products would be available. However, Tabular would appear to be targeting 40-nm process technology. The company said that when compared to 40-nm FPGAs, a 40-nm Spacetime device will deliver: 2.5x higher logic density, 2.0x higher memory density, 2.9x higher memory ports and 3.7x higher DSP performance.

The Spacetime compiler manages Tabula's reconfiguration transparently to the designer. Tabula said it will leverage Spacetime to deliver 3-D devices that have significant density advantages and dramatically shorter interconnects when compared to FPGAs that use 2-D architectures.

Tabula said it will deliver these benefits while preserving a traditional design methodology. As a result, Spacetime will enable a new class of programmable devices that combines the capability of an ASIC with the ease of use of an FPGA at price points suitable for volume production.

A Spacetime device reconfigures on the fly to execute multiple portions of a design in an automatically defined sequence of steps. The result is a design that uses the x, y and t dimensions and less physical resources to provide functionality. The result is a 3-D device with multiple layers or folds in which computation and signal transmission can occur. Each fold performs a portion of the desired function and stores the result in place. When some or all of a fold is reconfigured, it uses the locally stored data to perform the next portion of the function. By rapidly reconfiguring to execute different portions of each function, a 3-D Spacetime device can implement a complex design using only a small fraction of the resources that would be required by an inherently 2-D FPGA. A designer can realize all of the benefits of 3-D within a familiar methodology using the Spacetime compiler that automatically maps standard RTL into Spacetime.

And by using more local resources long-distance interconnect is reduced saving space and power. "The key to Spacetime and its many advantages is resolving the interconnect problem intrinsic to FPGAs," said Steve Teig, Tabula's president and CTO, in a statement. "Almost 90 percdent of the core area of FPGAs is devoted to the implementation and control of interconnect. Besides driving up die size and product cost, the long connections also limit performance and make timing closure more difficult. If you're going to achieve a breakthrough in programmable capability and affordability, you have to make the interconnect more efficient, and that's what Spacetime does."

Tabula was founded by EDA pioneer Steve Teig and is led by Dennis Segers, former CEO of Matrix Semiconductor and former senior vice president and member of the board of directors at Xilinx.

With support from venture capitalists including Greylock Partners, Benchmark Capital, New Enterprise Associates, Crosslink Capital, Balderton Capital, DAG Ventures, and Integral Capital, Tabula has over 80 patents granted around the Spacetime architecture with more than 70 more pending. Tabula is developing a family of general-purpose 3PLD devices that are based on the Spacetime architecture. Tabula will initially target the programmable logic market but will also extend the benefits of programmability into markets that FPGAs cannot serve cost-effectively.

"The programmable logic market is one of the most profitable segments of the semiconductor industry," said Dennis Segers, CEO of Tabula. "It was once one of the fastest growing as well, driven by rapid advancements in FPGA capability alongside Moore's Law. Since 2000, however, there has been only incremental improvement in FPGA architectures and circuits from the market leaders, leaving programmable logic customers underserved and limiting growth for the industry segment. With the Spacetime architecture, Tabula will bring unprecedented value into the programmable logic space, restoring innovation into this formerly vibrant market and accelerating its growth."

Related links and articles:

www.tabula.com

Sizing up the FPGA contenders

Comment: Arrgghh! My FPGA's not working