Tabula (Santa Clara, Calif.) has said hardware in its Spacetime architecture is re-used at multi-gigahertz rates by the dynamic reconfiguration of logic, memory, and interconnection to provide a density, cost, or power consumption advantage over conventional FPGAs. This approach is similar to that of Silicon Basis Ltd. (Bristol, England).

The initial ABAX products to be released by Tabula will be the A1EC02, A1EC03, A1EC04, and the A1EC06 with between 220,000 and 630,000 look-up tables per device. All four parts have 5.5-Mbytes of RAM, 920 parallel I/Os and 44 PLLs, Tabula said The A1EC06 has 1,280 multiplier-accumulator blocks. Designed for a range of applications, ABAX devices will initially target the telecom, enterprise, and wireless infrastructure markets and all the initial devices in the family include 48 serial transceivers operating at between 55-Mbit/s and 6.5-Gbit/s.

Implemented in a 40-nm process from foundry TSMC ABAX devices support a range of soft IP cores, including DDR2 and DDR3 memory controllers, PCI Express, Gigabit and 10 Gigabit Ethernet, soft CPUs, sRIO, CPRI, and OBSAI. The company did not say what system-level clock frequencies designers could expected to achieve.

"Tabula's benchmark results for ABAX show significant advantages in both density and capability for logic, memory and signal processing when compared with 40-nm FPGAs, enabling ABAX devices to offer programmability both in traditional FPGA applications and beyond." said Richard Wawrzyniak, market analyst with Semico Research Corp., in a statement issued by Tabula.

As an example of pricing for 2010 the A1EC04 is $150 per unit for orders of 2,000 units, Tabula said.

Related links and articles:

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