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Formality tackles ECOs
Synopsys' Formality tackles ECOs and cuts re-verification time from hours to minutes
EDA tool optimizes cell libraries for processor cores in SoCs
Synopsys' DesignWare HPC Design Kit allows SoC designers to optimize CPU, GPU and DSP IP cores for maximum speed, smallest area or lowest power.

Synopsys releases one library to rule them all
Synopsys has released a new physical library kit and set of scripts that they claim can provide some significant benefits across the entire SoC…
Comparison Tables
Technical Papers
Addressing the Complexity of "Smart" Devices Through Low Power Hierarchical Design
FPGA-Adaptive Software Debug and Performance Analysis
Configurable Mixed Signal Integration
Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms
Developing Safety Critical Applications that Meet IEC 61508 Standards
Preventing Structural Faults in Design: Clock and Resets
Preventing Structural Faults in Design: Data Path
A Tailored Approach to FPGA Process Selection
Long live the battery
Implementing Efficient Low-Power PCIe Interfaces with Low-Cost FPGAs
Commentary

Physical process simulation
Brian Bailey
Coventor simulates the fabrication process and they have just done a major upgrade to their SEMulator3D product…
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2 comments
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BrianBailey
Yes - it will be interesting to see which way the industry moves. I think we are facing more ...
Yes - it will be interesting to see which way the industry moves. I think we are facing more ...

Just in the nick of Tempus
Brian Bailey
Cadence has introduced a new signoff timing simulator that introduces multi-core path-based analysis that they say will provide a 10X performance increase and 3% reduction in pessimism…
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ProDesign is back
Brian Bailey
There are times when the EDA industry seems like the game of Whack-a-Mole. A company gets bought, the founders leave and start another company...
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Synopsys rolls out upgrade to HAPS
Brian Bailey
HAPS is going back to its roots with a more modular architecture and takes advantage of some new features in the Virtex 7 architecture giving more capacity and performance…
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1 comment
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Shreepad
Has been a good platform .. only if it were more affordable would it find a larger acceptance...
Has been a good platform .. only if it were more affordable would it find a larger acceptance...

Slideshow: Grenoble is tech R&D hot spot
Anne-Francoise Pele
We attended Leti’s Annual Review and toured the Minalogic competitiveness cluster dedicated to nanotechnologies and embedded software in Grenoble, France. The two-day session lifted our spirits.
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7 comments
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jak231
Today we offer the best and expensive hacks and cheats in the world.The question is why for ...
Today we offer the best and expensive hacks and cheats in the world.The question is why for ...

Companies with Power/Thermal related products
Brian Bailey
Part of the EDA Designline Power archive. Contains listings of companies and power related products plus links to their articles...
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Hardware/software co-design available for ARM-based FPGA designers using Space Codesign…
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2 comments
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garydpdx
There are other EDA tools that deal with hardware design space exploration with accelerators ...
There are other EDA tools that deal with hardware design space exploration with accelerators ...

Models, models, models…
Brian Bailey
Without models the EDA industry could not exist and when it comes to trying to promote a new abstraction level, models become the sticking point. Synopsys intends to change that…
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3 comments
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Robotics Developer
I see the same thing with PCB layout tools and the associated schematic capture tool libraries! ...
I see the same thing with PCB layout tools and the associated schematic capture tool libraries! ...

Finding the right part just got easier
Patrick Mannion
With the launch of Datasheets.com, EDN and UBM Electronics provide engineers access to over 185 million parts, with features such as comparison, parametric search, search save, and alerts.
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22 comments
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Dr DSP
It seems like the next phase of this effort needs to be driven by suggestions from users on the ...
It seems like the next phase of this effort needs to be driven by suggestions from users on the ...

Timing constraints can be more than a headache
Dylan McGrath
Trouble with timing constraints is an annoyance that plagues many a design engineer, but the results of a recent survey suggest that the issue can cause more than a few headaches and some lost hours of sleep.
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1 comment
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EREBUS
The sad part is a lot of people have timing problems, they just don't recognize them. Any time you ...
The sad part is a lot of people have timing problems, they just don't recognize them. Any time you ...
Recent Comments
Robotics Developer 06.18.2013
DARPA kicking off Virtual Robotics Challenge
DARPA kicking off Virtual Robotics Challenge
I wonder if this contest was well publicized? This is the first that I heard of it and I am bummed ...
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4 comments
jessebot 06.18.2013
Nokia, Samsung, Apple victims of smartphone 'tipping point'
Nokia, Samsung, Apple victims of smartphone 'tipping point'
You need to shop around, and ignore at&t/verizon/sprint/t-mobile. I pay $45/mo (that's the total ...
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12 comments
sprite0022 06.18.2013
China takes fastest supercomputer crown
China takes fastest supercomputer crown
ya, chinese's allwinner has the cpu now to do the job, but it would take 30 million of them, just ...
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3 comments
ProductPressRelease
Calypto introduces first interface module for HLS
Cree provides SPICE models for SiC power devices
ARM releases free version of its Development Studio for Android platforms
Tanner and Dongbu HiTek release PDK for BCDMOS chips
New ASIC Bitcoin Mining Products Producing 350GHash/s, from KnCMiner
Synopsys Delivers 2X Speedup for Implementing and Verifying Functional ECOs
Optmyzr Launches AdWords Quality Score Tracker.
GibbsCAM 2013 Released
Sigmetrix Launches GD&T Advisor v2.0
Closing the Gap: Enabling Individual Investors to Trade with the Sophistication of Institutional Investors
Electronics Company Directory
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Browse the technical library
Our technical library houses over 4,000 high-quality sponsored white papers, application notes, reference guides, use cases—all organized by company.
Our technical library houses over 4,000 high-quality sponsored white papers, application notes, reference guides, use cases—all organized by company.
Signal integrity issues on the riseOur virtual panel shares eye-opening advice for anticipating, detecting, and mitigating SI problems in faster, increasingly complex designs.


























