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Altera Stratix V GX FPGAs achieve PCIe Gen3 compliance
New Altera DMA reference design for Stratix V and PCIe Gen3 solutions now available.
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QuickLogic's camera I/F solution for TI's ARM MCUs & Android Jelly Bean 4.1.2 OS
Ready-to-use solution enables developers to take advantage of Android ecosystem; supports BeagleBone open source hardware platform and QuickLogic ...
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Aldec's Spec-TRACER for safety-critical FPGA & ASIC designs
Spec-TRACER provides requirements lifecycle management for FPGA and ASIC designs for use in safety-critical industries like avionics, automotive, ...
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Comparison Tables
Technical Papers
Addressing the Complexity of "Smart" Devices Through Low Power Hierarchical Design
Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms
Developing Safety Critical Applications that Meet IEC 61508 Standards
Preventing Structural Faults in Design: Clock and Resets
Preventing Structural Faults in Design: Data Path
A Tailored Approach to FPGA Process Selection
Long live the battery
Implementing Efficient Low-Power PCIe Interfaces with Low-Cost FPGAs
X-Propagation Woes: Masking Bugs at RTL and Unnecessary Debug at the Netlist
Clock and Reset Ubiquity: A CDC Verification Perspective
Commentary
Just in the nick of Tempus
Brian Bailey
Cadence has introduced a new signoff timing simulator that introduces multi-core path-based analysis that they say will provide a 10X performance increase and 3% reduction in pessimism…
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ProDesign is back
Brian Bailey
There are times when the EDA industry seems like the game of Whack-a-Mole. A company gets bought, the founders leave and start another company...
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Synopsys rolls out upgrade to HAPS
Brian Bailey
HAPS is going back to its roots with a more modular architecture and takes advantage of some new features in the Virtex 7 architecture giving more capacity and performance…
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Shreepad
Has been a good platform .. only if it were more affordable would it find a larger acceptance...
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1 comment
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Shreepad
Has been a good platform .. only if it were more affordable would it find a larger acceptance...
Slideshow: Grenoble is tech R&D hot spot
Anne-Francoise Pele
We attended Leti’s Annual Review and toured the Minalogic competitiveness cluster dedicated to nanotechnologies and embedded software in Grenoble, France. The two-day session lifted our spirits.
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7 comments
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jak231
Today we offer the best and expensive hacks and cheats in the world.The question is why for ...
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7 comments
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jak231
Today we offer the best and expensive hacks and cheats in the world.The question is why for ...
Companies with Power/Thermal related products
Brian Bailey
Part of the EDA Designline Power archive. Contains listings of companies and power related products plus links to their articles...
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Hardware/software co-design available for ARM-based FPGA designers using Space Codesign…
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garydpdx
There are other EDA tools that deal with hardware design space exploration with accelerators ...
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2 comments
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garydpdx
There are other EDA tools that deal with hardware design space exploration with accelerators ...
Models, models, models…
Brian Bailey
Without models the EDA industry could not exist and when it comes to trying to promote a new abstraction level, models become the sticking point. Synopsys intends to change that…
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Robotics Developer
I see the same thing with PCB layout tools and the associated schematic capture tool libraries! ...
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3 comments
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Robotics Developer
I see the same thing with PCB layout tools and the associated schematic capture tool libraries! ...
Finding the right part just got easier
Patrick Mannion
With the launch of Datasheets.com, EDN and UBM Electronics provide engineers access to over 185 million parts, with features such as comparison, parametric search, search save, and alerts.
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22 comments
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Dr DSP
It seems like the next phase of this effort needs to be driven by suggestions from users on the ...
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22 comments
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Dr DSP
It seems like the next phase of this effort needs to be driven by suggestions from users on the ...
Timing constraints can be more than a headache
Dylan McGrath
Trouble with timing constraints is an annoyance that plagues many a design engineer, but the results of a recent survey suggest that the issue can cause more than a few headaches and some lost hours of sleep.
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EREBUS
The sad part is a lot of people have timing problems, they just don't recognize them. Any time you ...
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EREBUS
The sad part is a lot of people have timing problems, they just don't recognize them. Any time you ...
In this viewpoint, Dr. Ajoy K. Bose, Atrenta's chairman, president and CEO, explains that SoC Realization represents the next natural and necessary step up in abstraction from existing EDA methodologies and is a necessary bridge from the more abstract world of system-level design that is helping drive SoC-enabled products.
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KarlS
Use of IP in an SoC is analogous to OOP, so much can be taken from OOP software development. The ...
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5 comments
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KarlS
Use of IP in an SoC is analogous to OOP, so much can be taken from OOP software development. The ...
Recent Comments
Wobbly 05.21.2013
Google's flirtation with being a hardware company is over
Google's flirtation with being a hardware company is over
I think the answer is, the vendors have finally stepped up to the plate, and Google doesn't feel the ...
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1 comment
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1 comment
dj85 05.21.2013
Qualcomm, Samsung pass AMD in microprocessor sales
Qualcomm, Samsung pass AMD in microprocessor sales
and MPU market gets more interesting
My friend at Intel just passed on info that new
CEO did a ...
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7 comments
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7 comments
luting 05.21.2013
Could Intel enable $200 Ultrabook?
Could Intel enable $200 Ultrabook?
It doesn't make any sense for Company like Intel to build this kind of laptop. Intel will kill ...
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6 comments
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6 comments
ProductPressRelease
Calypto introduces first interface module for HLS
Cree provides SPICE models for SiC power devices
ARM releases free version of its Development Studio for Android platforms
Tanner and Dongbu HiTek release PDK for BCDMOS chips
Ten Ton Hammer Launches SPARK, The Customizable Game & Geek News Browsing Website
Amdocs Unveils Industry's First Elastic Policy Control Solution
Altium Updates Flagship Product to Enhance Design Clarity and Reduce Supply Chain Risk
New Bad Credit Loans Matching Service Offers Potential for High Approval Rates
CasinoWebScripts Launches New Horse Race Arcade Game - "Lucky Horse Derby"
EMC Accelerates Transformation To Private Cloud Computing For Customers Running SAP Solutions
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Browse the technical library
Our technical library houses over 4,000 high-quality sponsored white papers, application notes, reference guides, use cases—all organized by company.
Our technical library houses over 4,000 high-quality sponsored white papers, application notes, reference guides, use cases—all organized by company.
Signal integrity issues on the riseOur virtual panel shares eye-opening advice for anticipating, detecting, and mitigating SI problems in faster, increasingly complex designs.
