New Software and Hardware Boost System, People Connectivity

A pervasive theme throughout almost any electronics conference and trade show is the need for better and faster connectivity—wired and wireless—between people, among pieces of equipment, and from users to electronic systems. This "connecting everyone and everything" idea fuels product and service development to support current and emerging communications standards, higher bandwidth communication channels, and a continuing convergence of video, audio, and data in information and Internet appliances.

In recent months, several vendors have announced new hardware and software products to help you develop chips and systems using both existing and evolving connectivity/communication standards. A few of the more significant products, demonstrating the breadth of vendor technical support, are described in the following paragraphs.

USB
The Universal Serial Interface (USB) has become a fixture in many PC/peripheral connectivity applications (view a 35 min. lecture to learn the USB basics). AMI Semiconductor (AMIS) has an IP-based kit that helps designers integrate the USB interface into SoC chips. The kit comprises the silicon IP (SIP), supporting tools, and documentation for developing a complete USB device, supporting USB 1.1 and the new high-speed USB 2.0 standards. The SIP comes as synthesizable RTL-code descriptions for the USB interface engine along with other important device cores. Also included are simulation testbenches, verification scripts, and a USB test host.

Standard with the kit is an R8051 8-bit RISC microcontroller core, but the kit is also compatible with other third-party microcontrollers. The USB device architecture can support up to 31 fully configurable USB endpoints. Other hardware features of the USB device include external microcontroller ports, a DLL clock generator, and a USB transceiver pad that sources and sinks serial USB data from the USB interface.

HyperTransport
Addressing "in-the-box" connectivity, NurLogic Design has a HyperTransport physical-interface (PHY) core, with an aggregate bandwidth of 12.8 Gbits/s, in a 0.13-micron CMOS process. HyperTransport's high-speed, high-bandwidth data-transfer rates makes the core useful for high-performance networking, telecommunications, computer, embedded-system, consumer-electronics, and Internet-connectivity applications (for more information, read the HyperTransport tech paper). HyperTransport is a high-performance, low-latency, point-to-point link for chip interconnect, complementing existing bus standards such as PCI as well as emerging technologies including PCI-X, InfiniBand, and 10-Gigabit Ethernet.

NurLogic's AmberBridge HyperTransport PHY core comprises a transmitter, receiver, and impedance calibrator, using enhanced LVDS signaling technology (read the LVDS vs. Differential CML feature article for more information). The core is compliant with the HyperTransport Technology PHY Interface Specification (Version 1.01) and the HyperTransport I/O Link Protocol Specification (Version 1.03).

Chip-verification software vendor TransEDA, a new member of the HyperTransport Technology Consortium, is addressing the problem of verifying the connectivity protocol with the company's HyperTransport Verification Suite, consisting of a HyperTransport bus-functional model (BFM) and a HyperTransport property library. Based on the Consortium's HyperTransport I/O Link Specification (Version 1.03), the BFM is part of TransEDA's Foundation Models system-level verification IP library.

The HyperTransport BFM is part of TransEDA's Foundation Models system-level verification IP library. The model is user-configurable, includes a protocol monitor, and can be configured as a fully functional HyperTransport Host Bridge (HTHB) or a single-link device. You can use the BFM as a stand-alone model via a transaction-level API for integrating with existing verification environments, or with TransEDA's VN-Control application-specific test automation software for a complete system-level verification environment.

The second piece of the HyperTransport Verification Suite is a property library describing the HyperTransport specification in terms of both expected and prohibited protocol behaviors. This library, used with TransEDA's recently announced VN-Property DX dynamic property checker, helps ensure that a designer did not violate any HyperTransport operating rules during simulation and provides detailed protocol coverage metrics and reports. VN-Property DX, part of the company's Verification Navigator tool suite, measures the effectiveness of simulation against design-specific properties during chip simulation, acting as a bridge between formal verification and simulation. The verification tool checks for both expected and prohibited behavior and allows new properties to be added and checked, even after simulation. Along with pre-defined property libraries, such as the one describing the HyperTransport specification, you can create your own HDL-neutral properties in Perl to use with the property checker.

Bluetooth
India-based wireless product vendor Impulsesoft has released BlueCE, a Bluetooth Protocol Stack for Pocket PCs, with support for audio applications (read Part I: Introducing Bluetooth and Part II: Bluetooth—The Technical Details for an introduction to Bluetooth). BlueCE, a certified Bluetooth V1.1 stack driver, enables any Pocket PC-based handheld device to transfer audio along with data to other Bluetooth devices, such as headsets and mobile phones, enabling the convergence of PDAs with mobile phones. Other applications include Point of Sale (POS) terminals, web pads, and web phones. Impulsesoft has tested the stack on card hardware from several silicon vendors running on existing devices including Compaq's iPAQ, Cassiopeia, and HP's Jornado.

Other Wireless
NurLogic also has a new family of hard silicon-IP serializer/deserializer (SerDes) cores for systems using 10-Gigabit Ethernet (XAUI), Infiniband, Gigabit Ethernet, and Fiber Channel architectures. The Diamond Series cores provide high-bandwidth connections between router backplane links, sustaining 1.0-3.318 Gbits/s, while supporting an 8B/10B encoding/decoding scheme with clock recovery for embedded clock applications. NurLogic implemented the transceiver core as a four-channel (Quad) device that meets OC768 speed requirements. You use the SerDes core in networking applications to do parallel-to-serial and serial-to-parallel conversions for physical and link-layer devices. The Quad core also has several useful test features including Built-In Self-Test (BIST), serial and parallel loop-back, IDDQ, boundary scan, and Pseudo-Random Bit Steam (PRBS).

Microwave
MEMS (micro-electromechanical systems) technology is slowly making inroads into wireless-systems (read Lilliputian Machines Set To Revolutionize RF, Optoelectronics, and Biomedical Applications for more information). MEMSCAP has just introduced the first commercially available MEMS microwave filter technology. The first use for the technology is filter implementation for Local Multipoint Distribution Services (LMDS) to reduce size, weight, and cost of customer-premise equipment. The LMDS filters are capacitively end-coupled resonators on a suspended dielectric membrane. The edge-coupled section of the microstrip line is used as a transformer coupling to the filter, setting the device's external quality factor.

The filters reside on high-resistivity silicon substrates and involve gold electroplating, backside wafer etching under the resonator, and suspension of a dielectric membrane. Shielding cavities increase the unloaded quality factor of the devices, which come in hybrid or surface-mount technology (SMT) packaging for board-level assembly or direct integration. Other applications for the filters include automotive, radar, and space-born applications, falling within an 18-to-90 GHz range.