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Product Brief

Virage Logic offers PCI Express PHY IP in volume


7/28/2009 8:40 AM EDT
Virage Logic Corp. announced a silicon and volume production-proven 40-nm G PCI Express Gen1/Gen2 Physical Layer (PHY) IP block.

The SiPro PCI Express PHY product line represents the first offering in Virage Logic's advanced interface IP SiPro product portfolio that is a result of its collaboration with AMD announced in January 2009.

This agreement grants Virage Logic the rights to license and modify certain AMD standards-based advanced interface IP that was designed for and used in the 40nm ATI Radeon graphics products from AMD.

The Virage Logic SiPro PCI Express PHY is based on the successful implementation by AMD at 65nm, 55nm and 40nm, where it has been used in high-volume production for PC-oriented chipsets and graphics adaptors.

The Virage Logic SiPro PCI Express Gen1/Gen2 PHY is available immediately for licensing on the industry's leading commercial bulk 40nm process node.





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