Synopsys unveils DesignWare STAR ECC IP

Synopsys Inc. has delivered the DesignWare STAR ECC (Self-Test and Repair Error Correcting Codes) IP as part of its DesignWare STAR Memory product family to help reduce embedded memory transient errors.

Indeed, the DesignWare STAR ECC IP offers an automated design implementation and test diagnostic flow that helps SoC designers quickly reduce the number of embedded memory transient errors, such as soft errors, that occur in emerging semiconductor process technologies.

Key features:
•   Enables designers to select the desired level of fault tolerance
•   Generates the corresponding IP through the STAR ECC Compiler
•   Provides flexibility that offers a higher level of protection against transient errors, when compared to the classical ECC approach
•   Provides optimal performance of partial word writes and improved error detection/correction capability in multibit upsets and random bit errors
•   Offers five types of error code correction including:
   . Single Error Detection (SED)
   . Single Error Correction (SEC)
   . Single Error Correction with Double Error Detection (SEC_DED)
   . Single Error Correction with Force Error Detection (SEC_FED)
   . Single Error Correction with Double Error Detection and Force Error Detection (SEC_DED_FED)

Target applications:
- Automotive,
- Aerospace,
- High-end computing.

Availability:
Now.


For more information, click here.