TSMC announced it has licensed Nangate Design Optimizer (NDO) and Library Creator from EDA startup Nangate A/S to improve chip implementation performance on advanced process nodes.
TSMC said it has deployed Nangate's products to achieve speed improvements unachievable until now through traditional physical synthesis flows and library IP.
Nangate Design Optimizer is the re-synthesis solution for next-generation physical design flows. The Design Optimizer brings together standard-cell library creation with gate-level optimization to provide significant improvements in design speed, power consumption and area.
Nangate Library Creator is a versatile, integrated and easy-to-use solution for digital cell library creation and optimization. It enables designers of digital CMOS ICs to custom-tailor digital cell libraries and explore the impact of alternate device models, design rules and cell architectures.
TSMC said it is using Nangate Design Optimizer to enable improved design performance as compared to traditional synthesis techniques. NDO integrates seamlessly with the latest generation of physical design flows to achieve improved SoC performance and improved designer productivity.
NDO utilizes a new library set built and validated by Nangate Library Creator standard cell development and characterization platform. Nangate provides a unique capability to create a very large set of fine-grained drive and skew cells together with combined, complex and leakage control cell variants that enable the digital logic of an IP core or SoC design to operate with significantly higher performance than with a traditional standard cell library approach.