Synopsys rolls next gen DesignWare Data Converter IP
3/23/2011 12:09 PM EDT
Synopsys Inc. has released the next generation DesignWare Data Converter IP solutions to help designers significantly reduce the area and power dissipation of their system on chips (SoCs), simplify system integration and lower overall silicon cost.
Synopsys' DesignWare Data Converters IP solutions are indeed claimed to deliver 50 percent lower power with smaller area compared to the previous generation of data converters.
Synopsys' new ultra low power and compact DesignWare Data Converter IP solutions consist of high performance, analog-to-data converters (ADCs) and digital-to-analog converters (DACs), including:
• 10 bit and 12 bit pipeline ADCs running up to 250 MSPS in single channel and dual channel configurations
• 14 bit current steering DACs running up to 400 MSPS in single channel and dual channel configurations
Synopsys' DesignWare Data Converter IP targets broadband wireless communication applications such as WiFi, WiMAX, LTE, and digital TV reception. The Data Converters are also suitable for emerging, very high data rate standards such as WiFi (802.11ac) and home networking (G.hn), and for the direct conversion of high intermediate frequency (IF) signals.
- The new DesignWare Data Converter IP solutions for the 65 nm LP process are available now.
- Support for the 40 nm LP process is expected to be available in the second quarter of 2011.
- Current DesignWare data converters for broadband communication applications, such as 10 bit General Purpose (GP) ADC, 11 bit GP DAC and 12 bit current-steering dual DAC, are also available now in the 65 nm LP and 40 nm LP processes.