Product Brief
Evatronix rolls USB 2.0 high speed PHY to complement its USB offering
Toni McConnel6/28/2011 4:39 PM EDT
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Evatronix SA has introduced a USB high speed PHY IP that complements the company's suite of USB 2.0 device and host controllers. Evatronix USB 2.0 PHY has been silicon proven and guarantees compliance with all relevant layers of USB specification for high, full and low speeds.
The Evatronix USBHS-PHY is a complete mixed-signal transceiver macro-cell that implements the USB 2.0 Physical Layer for Host and Device applications. It is compliant with the UTMI+ specification.
The Evatronix USBHS-PHY features a built-in self test, self calibration termination, and pull-up resistors for seamless operation. It also supports regular 3.3V analog and 1.8V digital core supplies, both with 10% of voltage tolerance. Numerous other features enable designers to tailor the USBHS-PHY to the needs of a particular application.
The Evatronix USBHS-PHY logic macro is available now on the LFoundry 150nm process with the possibility to port it to any technology node from 45 to 180nm.
For more information visit www.evatronix.com/ip.
Toni McConnel can be reached at Toni@TechRite-Associates.com.
The Evatronix USBHS-PHY is a complete mixed-signal transceiver macro-cell that implements the USB 2.0 Physical Layer for Host and Device applications. It is compliant with the UTMI+ specification.
The Evatronix USBHS-PHY features a built-in self test, self calibration termination, and pull-up resistors for seamless operation. It also supports regular 3.3V analog and 1.8V digital core supplies, both with 10% of voltage tolerance. Numerous other features enable designers to tailor the USBHS-PHY to the needs of a particular application.
The Evatronix USBHS-PHY logic macro is available now on the LFoundry 150nm process with the possibility to port it to any technology node from 45 to 180nm.
For more information visit www.evatronix.com/ip.
Toni McConnel can be reached at Toni@TechRite-Associates.com.
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