Micron launches power-sipping DDR3 DRAM

A new family of 2-Gb and 4-Gb DDR3 memory modules manufactured using 30-nm process technology targets the discrete graphics and high-performance networking markets. Offered in in x4, x8, and x16 configurations, the 1 GHz units from Micron deliver data rates as high as 2133 MT/s and operate on 1.5 V. They are available in multiple form factors, including networking-specific ECC UDIMMs.

Features include:

• 1.5 V center-terminated push/pull I/O
• Differential bidirectional data strobe
• 8n-bit prefetch architecture
• Differential clock inputs (CK, CK#)
• Eight internal banks
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Programmable CAS READ latency (CL)
• Posted CAS additive latency (AL)
• Programmable CAS WRITE latency (CWL) based on tCK
• Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
• Selectable BC4 or BL8 on-the-fly (OTF)
• Self refresh mode
• TC of 0°C to 95°C
• 64ms, 8192 cycle refresh at 0°C to 85°C
• 32ms, 8192 cycle refresh at 85°C to 95°C
• Self refresh temperature (SRT)
• Write leveling
• Multipurpose register
• Output driver calibration

Suppliers AMD and LSI worked closely with Micron throughout the development process. "Massive data growth continues to tax storage and networking equipment, and contending with that growth requires high-performance memory interfaces to meet system bandwidth requirements," says Harold Gomard, SerDes and DDR IP product manager for LSI.

Depending on the part number, the modules are available in flat-free FBGA packages of 78 balls, 96 balls, or both. For a comprehensive list of additional options, see the datasheets. Micron is sampling the devices with volume production slated for this summer.


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