MIPI IP supports 1 Gbits/s operation, multiple data channels

MIPI IP supports 1 Gbits/s operation, multiple data channels
San Jose, Calif. — Mixel Inc. has announced the availability of a Mobile Industry Peripheral Interface (MIPI) standard D-PHY virtual component IP. The MXL-PHY-MIPI is a MIPI standard revision 0.90 compliant D-PHY that allows bi-directional transfer of video and control data between the host processor and display or camera module, and includes both the analog and digital D-PHY blocks.

The MXL-PHY-MIPI is a point-to-point differential interface supporting a clock and multiple data lanes. The scalable data lanes support both bi-directional and uni-directional modes. The high-speed mode offers up to 1Gbits/s data transfer per lane while the low-power mode offers reduced power consumption. The IP can be used in master/slave configuration and offers optional half-duplex operation.

Availability: The MXL-PHY-MIPI is offered for TSMC and Chartered's 0.13 um LP process technology and will later be offered for other process nodes and foundries.
Datasheet: MXL-PHY-MIPI IP

Mixel, 1-408-942-9300, www.mixel.com