Product Brief
Freescale accelerator replaces basestation FPGAs, ASICs
Kenton Williston6/18/2008 12:00 PM EDT
The MSBA8100 supports Turbo and Viterbi decoding, Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), Discrete Fourier Transform (DFT) and Inverse Discrete Fourier Transform (IDFT) operations currently performed in FPGA or custom ASIC devices. It also accelerates rate de-matching for various wireless standards and security algorithms. These include EDCH for 3GPP, sub-block de-interleaving and de-interlacing with HARQ support for 3G-LTE and WiMAX.
The MSBA8100 contains two configurable RISC engines. It also includes 512 Kbytes of internal memory, a DDR-2 memory controller and a PCI controller. The device is intended to be used with Freescales MSC8144 DSP. The accelerator communicates with the MSC8144 DSP and the antenna through two high speed serial RapidIO interfaces, each scalable up to four lanes at 3.125Gbaud.
A MSBA8100ADS development board is available from Freescale. The board ships with the MSBA8100 device and a MSC8144 DSP, and includes an AMC expansion connector. Frescale also offers reference software kernels.
MSBA8100 device samples are expected to be available during the third quarter of 2008. For more information, visit www.freescale.com/dsp.



