Featured Product: TI dual-core MCU geared for auto safety applications

Texas Instruments TMS570F microcontroller is claimed to be the industry's first ARM® Cortex-R4F processor-based floating point, lock step dual-core automotive MCU. Featuring twin Cortex-R4F processors, the devices met IEC 61508 SIL3 or ISO26262 ASIL D safety standards for use in critical systems such as braking, steering, chassis and stability control, and advanced driver assistance.

Integrating dual cores into one unit helps curb the burgeoning growth of the number of MCUs within today's cars, Charles Murphy, TI marketing manager for automotive microcontrollers tells Automotive DesignLine. The lockstep architecture works by comparing the output of each core for error detection, thus, he adds, software for error testing, which would take up valuable program space in flash, is not needed.

Floating point adds precision and differentiation, speeds time-to-market, and allows protecting IP for product differentiation. With the TMS570F designers can implement both single and double precision floating point math depending on performance requirements. Accelerated multiply, divide, and square root functions enable physical model-based control through development tools such as The Mathworks Real Time Workshop and ETAS ASCET. These graphical-based environments help engineers accelerate complex safety application designs and add differentiation through custom vehicle control algorithms for unique handling, ride, and user experience.

Developers typically begin creating algorithms in a floating point environment for validation, and then convert the code to run on fixed-point devices. Using the TMS570F MCU, developers can eliminate much of the time spent contending with scaling, saturation, and adjustment of numerical resolution required in fixed point implementations. The dual-core lockstep also simplifies software development by removing redundant safety system requirements.

Hardware built in self test (BIST) of both memory and CPU functions further increases integration and lets designers detect latent defects without using complex safety software drivers that reduce performance and require code size overhead.

Error correction code (ECC) logic is integrated into the Cortex-R4F, which protects both the memories and busses. Because ECC is evaluated within the CPU, the system takes advantage of the eight-stage pipeline to allow time for ECC evaluation with no performance impact. In the event of a memory error, the ECC logic will correct it, rather than just communicating the error and stopping the system.

The TMS570F uses two identical ARM Cortex-R4F processors combined with an initial 2 Mbytes of on-chip flash memory. Industry standard peripherals include FlexRay protocol controller, up to three CAN and two LIN modules along with TI's timer co-processor, and two 12-bit analog to digital converters (ADC).

For more information on the TMS570F MCUs, visit: http://www.ti.com/tms570f.