Pentek's multiband SDR transceiver delivers 10 dB A/D performance improvement

The successor to Pentek's Model 7140 transceiver significantly boosts analog performance so that the signal-to-noise ratio and the spurious free dynamic range are improved by 10 dB, when compared to many competitive products.

Pentek attained the superior analog performance with proprietary design techniques in the analog front end. Although A/D converter device manufacturers cite attractive specifications, realizing those performance levels depends primarily on the printed circuit board layout, component shielding and power supply filtering.

The Model 7141 accepts two full scale analog HF or IF inputs on front-panel MMCX connectors at +10 dBm into 50 ohms with transformer coupling into Linear Technology's LTC2255 14-bit 125 MHz A/D converters. A/D output samples are delivered into the Virtex-II Pro FPGA for signal processing or for routing to other module resources.

A TI/Graychip GC4016 quad digital down-converter accepts either four 14-bit inputs or three 16-bit digital inputs from the FPGA, which determines the source of GC4016 input data.

These sources include the A/D converters, FPGA signal processing engines, SDRAM delay memory and data sources on the PCI bus. Each GC4016 channel may be set for independent tuning frequency and bandwidth.

For an A/D sample clock frequency of 100 MHz, the output bandwidth for each channel ranges from 5 kHz up to 2.5 MHz. By combining two or four channels, output bandwidth of up to 5 or 10 MHz can be achieved.

A TI DAC5686 digital upconverter (DUC) and dual D/A accepts baseband real or complex data streams from the FPGA with signal bandwidths up to 40 MHz. When operating as an upconverter, it interpolates and translates real or complex baseband input signals to any IF center frequency between DC and 160 MHz.

It delivers real or quadrature (I+Q) analog outputs through two 320 MHz, 16-bit D/A converters to two front-panel MMCX connectors at +4 dBm into 50 ohms.

If translation is disabled, the DAC5686 acts as a two channel interpolating 16-bit D/A with output sampling rates up to 500 MHz.

The optional factory-installed interpolation filter core 450 increases the sampling rate of real or complex baseband signals by a factor of 16 to 2048, programmable in steps of 4, and relieves the host processor from performing upsampling tasks. The interpolation filter can be used in series with the DUC's built-in interpolation, creating an overall interpolation range for the module from x2 to x32,768.

The Xilinx XC2VP50 Virtex-II Pro FPGA serves as a control and status engine with data and programming interfaces to each of the on-board resources including the A/D converters, GC4016 digital downconverter, digital upconverter and D/A converters.

Two independent internal timing buses can provide either a single clock or two different clock rates for the input and output signals.

Each Model 7141 can act as either a timing bus slave receiving timing signals or as a master driving up to seven boards supporting synchronous sampling and sync functions across all connected boards. Up to 80 boards may be synchronized with a Model 9190 Clock and Sync Generator.

The Model 7141's optional XMC connection complies with the VITA 42 XMC specification and supports high-speed switched-fabric interconnects such as Serial RapidIO and PCI Express. Dual 4X links between the XMC module and the carrier board handle serial-bit rates up to 3.125 GHz. These links operate independently of the PCI interface and achieve streaming data transfer rates of up to 2.5 GB/sec.

The PMC/XMC commercial version of the Model 7141 Dual Multiband Transceiver with FPGA is priced at $10,995 USD, with delivery 8 to10 weeks ARO. The Model 7141 is also available in PCI or 3U and 6U cPCI form factors and ruggedized versions.

More information is available at www.pentek.com.