In Version 2008, the appearance of the overall interface can now be switched back and forth to appear much like Microsoft Office 2000 or 2003. AWR explains that it made these changes to make it easier for users to customize the design environment to suit personal preferences, with the goal of streamlining various design tasks to save time and optimizing the screen space available for design.

The AWR-APLAC foundry-approved RF simulation capability was previously available only as an option in the AWR design environment, but now comes as a standard HB engine in Version 2008 for customers who license the HB capabilities of the Microwave Office design environment. The APLAC engine is targeted at designers of complex, extremely nonlinear circuits and is based on a proprietary implementation of HB analysis that complements the frequency-domain simulation capabilities of Microwave Office. It has been fine-tuned based on more than 15 years of experience in RFIC design at Nokia and other device manufacturers, and AWR notes that it has been used in the design of more than 30 percent of all mobile phone RFICs.

In addition to the user interface and APLAC enhancements, Microwave Office software now incorporates ICED IC verification software along with its support for Mentor Graphics Calibre®. Since the last major release, AWR has added advanced process design kits for TriQuint Semiconductor, WIN Semiconductors, and United Monolithic Semiconductors (UMS), and more are planned for the coming months.

Version 2008 also features enhancements to AWR's Visual System Simulator™ (VSS) software, which was integrated into the AWR design environment several years ago. This software suite aims to assist the end-to-end design and optimization of communications systems by enabling the impact of "real-world" signal impairments and other factors to be evaluated early in the design cycle when they can be addressed most effectively. VSS provides the tools necessary to optimize each of the components in a system architecture from the behavioral through component levels (in conjunction with Microwave Office software or AWR's Analog Office® software), and then using actual device measurements to validate the final design.

VSS also includes an enhanced RF Budget Analysis™ tool, which enables the user to make traditional RF cascaded measurements along a communication link, that now uses a circuit solver and expands the range of supported topologies. Co-simulation with Microwave Office, including the APLAC HB engine, is also now enabled.

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