The CoWare Inc. Virtual Platform family lets hardware designers create virtual platforms using SystemC, and package them into run-time environments that provide interfaces to software development tools. The virtual platforms claim to support development and validation of an entire device software stack up to the applications level. The Panorama environment from Summit Design Inc., in contrast, is aimed more at software architects making high-level decisions.

Both companies are pursuing a similar idea – the development and use of virtual platforms that provide a software model of system hardware. If such platforms run fast enough, software development doesn't need to wait for an FPGA prototype, a hardware emulator, or a manufactured chip.

"I think this is the way that a number of companies are going to be moving, especially in highly competitive areas," said Matt Volckmann, senior analyst at Venture Development Corp. "There is an obvious value in being able to test and debug earlier in the design process. But there's always a tradeoff between the effort necessary to enable that simulation, and the reduction of project risk."

As ESL changes the design methodology to move away from separate hardware and software development, the EDA and embedded software development worlds "are probably going to converge more," Volckmann said.

"At CoWare, we decided we're going to be the bridge between the EDA hardware world and the software world," said Alan Naumann, CoWare CEO. "Estimates are that there are a half-million embedded software developers, but there are no tools that allow them to develop products on targeted hardware before the hardware is introduced."

"We're expanding our market from focusing on the hardware architect to focusing on both the hardware and software architects, as well as true systems architects responsible for both," said Emil Girczyc, Summit CEO.

The virtual platform concept is not new. The new offerings from CoWare and Summit claim to be distinctive because of their direct connections to the SystemC hardware development environment. Neither asks software developers to write System C code, but since a SystemC model underlies the virtual platform, the very same model can be used as the starting point for hardware implementation.