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Mercury joins Xilinx Alliance, rolls RapidIO core
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EE Times


SAN FRANCISCO — Mercury Computer Systems Inc. has joined the Xilinx Alliance Program and introduced a new Mercury Serial RapidIO intellectual property (IP) core for the Xilinx Virtex and Spartan FPGA families, Mercury said Wednesday (March 29).

The Xilinx Alliance Program is composed IP, EDA, DSP, and embedded development tool providers, as well as design services, board-level products, IC, and electronic components companies. Member companies provide optimized products and services that contribute to a broad selection of industry-standard solutions dedicated for use with Xilinx programmable logic.

Mercury (Chelmsford, Mass) said the new Serial RapidIO offering is a full-featured, high-function IP core that incorporates a logical layer, a transport layer and a physical layer, and supports input/output and message passing.

Compliant with the widely adopted Serial RapidIO specification 1.2, the Mercury IP core targets a wide range of applications for embedded, communications, wireless, storage and defense markets, Mercury said. Designers using Xilinx Virtex high-performance FPGAs can incorporate Mercury's IP to create devices with a robust Serial RapidIO endpoint for a variety of applications, Mercury said.

Pricing information was not disclosed.






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