A sea change is happening in the way software developers create and debug the software for many complex systems-on-silicon, the software-rich chips where a large part of the system is implemented as software as opposed to specialized silicon blocks. Traditionally, software development happened on a hardware surrogate for the chip-to-be; now, more and more developers are transitioning to developing software on a software model of the chip-to-be. Such a model is known as a virtual platform.

In the past, the primary development platform was a hardware board with FPGAs and a processor, along with in-circuit emulators (ICEs) and logic-state analyzers. However, systems are getting too complicated for this approach to be viable going forward: the clock rates are getting too fast, and the software teams are getting too large to be supplied economically with enough hardware. In short, hardware approaches to software development are reaching the end of their natural life.

Software approaches have centered around a write-once port-twice methodology where the software is developed on the host PC on some sort of test scaffold, perhaps even using an operating system simulator. The software is then ported to the eventual chip, once it is available. This approach works well for software that has negligible real-time dependency and does not interact intimately with the hardware. A good example would be a calendar application for a handheld computer. However, this approach breaks down when there are hard real-time constraints on the software. It is impossible to predict the actual performance from the PC implementation, which is all that is available until the chip is delivered. The approach fails totally for software that interacts closely with the hardware, such as device drivers or operating system modules, since the hardware is not modeled at a level that is detailed enough even for the code to run.

Another software approach in the past was the use of instruction set simulators (ISSs). These varied in the fidelity of their modeling of hardware but were usually accurate enough for a detailed analysis of real-time performance and hardware interaction. The trouble was that they were too slow, at around 100-500 KIPS (0.1 to 0.5 MIPS), to run a realistically large body of software and much too slow to be a part of every software engineer's day-to-day edit-compile-debug cycle.

The fundamental issue is that, to be useful, any solution must deliver both speed and accuracy. Speed so that large bodies of software can be run, including real-time operating systems and network protocol stacks. Accuracy so that measurements of real-time performance or detailed hardware interaction are useful as predictors of correct performance on the chip-to-be.

New developments in simulation technology from VaST deliver both of these two attributes at the same time. Virtual platforms now simulate faster than single-board computers with in-circuit emulators and are just as accurate. Moreover, since they can freeze time and lay all the internals bare, they are much easier to use for debugging the software, especially in the most complex systems, which have multiple processors (for example, cell phone chips all contain a minimum of one general-purpose processor and one digital signal processor).

In addition to better observability (meaning that quality code can be delivered more quickly), the virtual platform approach can be used ahead of the hardware design of the chip itself. This means that software development can be completely overlapped with chip development, resulting in significant decreases, not in the time to complete the chip, but in the time to complete the software. It is this milestone, rather than chip tapeout, that is the most critical gating item to shipping the system in volume. One customer of VaST in the cell phone business estimates that they are saving nine months out of a two-year development cycle, in effect leapfrogging an entire product cycle.

There are thus two drivers of the transition to virtual platform technology: the need to accelerate product development and the need to improve product quality. Product groups with tight time-to-market needs, such as cell phones or consumer products, can get products completed significantly faster. Products with very high reliability requirements, such as automotive or aerospace, can raise their productivity and so meet their reliability standards with less manpower.

The supply chain for a system often has a semiconductor vendor providing the chip and, perhaps, some part of the embedded software. The system customer provides the bulk of the embedded software. In this scenario, the virtual platform model has to come from the semiconductor company since they have the detailed information needed to build it. Creating the behavioral models of the various blocks on the chip seems to take about five per cent of the effort of creating the RTL description necessary as the starting point of chip design. Five percent effort up front is not prohibitive given the large increases in productivity and decreases in development cycle time that result. Even though it is the customer of the semiconductor company that is creating the software, it remains true that the semiconductor company will not receive production orders for the chip until embedded software development is complete.

Different development groups are making the transition to a virtual platform methodology at different times, but, as Gartner Dataquest pointed out at DAC this year, within a few years virtual platform simulation will be the dominant approach to embedded software development. The most advanced groups, those that require detailed real-time performance data and require a detailed look at activity on the hardware/software boundary, have made the transition to virtual platforms, or are in the process. Many system groups are waiting for their semiconductor suppliers to complete the transition, but expect to then move quickly themselves. The result will be a new standard approach to embedded software development that delivers a higher quality product earlier using fewer developers.

Paul McLellan is VP Marketing and Business Development at VaST Systems Technology, Inc. (Santa Clara, Calif.)