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Low-Power Design








EE Times



Tackling low-power design
When designing high-speed parallel processors for compute-intensive applications, high performance and low power must be designed in from the beginning. With this in mind, ClearSpeed Technology developed the CS301, a floating-point processor that achieves upward of 25-gigaflop performance. This 40 million-transistor, 0.13-micron chip supports multi-Vdd and dissipates less than 1.8 watts typical. With experienced designers, clear design goals and an integrated system for concurrent analysis and implementation, the company took the CS301 from concept to working parts in less than five months.


  • Speedy processor runs on low power
  • System-level tools slash SoC dynamic power
  • Feed-forward flow enables design success
  • Low-power SRAMs improve system picture


  • Design and evaluation of power-efficient SoCs
  • Power optimization provides significant power savings











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