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Silicon on Insulator
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EE Times
(09/23/2002 10:38 AM EDT)


Future points to SOI with strained silicon
This is an exciting time for anyone involved in silicon-on-insulator technology, as leading companies move from partially depleted SOI to strained silicon channels on SOI substrates.


  • ICs tailored for exotic substrates
  • Buried oxide sharpens dopant profile
  • Oxide isolation ramps next-gen process
  • SOI CMOS requires complex modeling


  • Better models, production methods expand SOIapplications
  • Expanding MEMS with low-cost SOI wafers
  • SOI sharpens the leading edge as silicon scales to 90 nanometers
  • Material innovations transform mainstream processor design






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