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Testing SoCs
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EE Times



SoCs challenge production test methods
Ironically, as the success of the system-on-chip has driven down direct silicon costs as a component of system cost, it has accentuated the very factor engineers are struggling to control: test cost. On one side, SoCs are becoming increasingly difficult-if not impossible-to test, and on the other side, test costs are in the spotlight as never before.


  • Serial storage SoCs demanding to test
  • Scan-based transition-fault test can do job
  • Open architecture ATE tackles test woes
  • Vectorless test: best bet for high-speed I/O


  • Traveling at the speed of memory
  • Source-synchronous clocks pose challenges
  • Architecture-based vs. flow-based approach to DFT






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