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Process trade-offs








EE Times
(02/11/2004 3:37 PM EST)


Process technology tradeoffs
Dealing with the frustrating design constraints of ultradeep-submicron technology is a lot like weeding a garden. No matter how much progress you make, the next day something new seems to pop up.


  • Designing analog circuits in CMOS
  • Designing radio systems for the future


  • Addressing packaging concerns of low-k silicon
  • Structured ASICs convert well to FPGAs
  • Surface waves measure stiffness of low-k materials











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