Unfortunately, PAM-4 signaling results in increased sensitivity to crosstalk and/or reflection as well as increased system complexity. In response to this situation, we have developed a new backplane transceiver that employs duobinary signaling [2] over copper traces. It uses three techniques: edge equalization for equalizer adaptation; an oversampled transmitter equalizer for intersymbol interference (ISI) control; and two-bit, transition-ensure encoding for clock recovery.

Duobinary signaling is a type of partial-response signaling that can be helpful in reducing the required maximum frequency because it allows for a controlled amount of ISI to be removed afterward. In duobinary signaling, channel loss and transmitter/receiver equalization combine to produce ISI, which may be expressed as the z function 1+z - 1. Transmitter/receiver equalization results in binary input data being output as a duobinary signal in accord with the function 1+z - 1, that is, 1+(1)=2, 1+(0)/0+(1)=1, 0+(0)=0, where the value inside each parenthesis denotes a preceding data bit.

The respective eye heights of duobinary, PAM-2 and PAM-4 signals can be compared by using a channel loss value at a corresponding Nyquist frequency: fnyq (PAM-2), fnyq/2 (PAM-4) and 2fnyq/3 (duobinary), where fnyq is half the symbol rate of PAM-2. Although duobinary is not Nyquist signaling but a partial-response signaling, we have defined the Nyquist frequency of duobinary signaling to compare its characteristics with the other signaling methods. The Nyquist frequency value was determined by the sampling frequency at which you can recover original waveforms of optimum duobinary single-bit response with 1.5-Tsymbol transition time (where Tsymbol is the symbol interval for PAM-2/duobinary).

We calculated each relationship between Nyquist frequency and eye height from theoretical transfer curves for PAM-2/4 (cosine roll-off) and duobinary (1+z - 1). The eye height of the PAM-4 signal is 2.1 dB above the gain at fnyq. The eye height of the PAM-4 signal is 7.4 dB below the gain at fnyq/2 because of four-level signaling. In contrast, the eye height of a duobinary signal with three levels is only 1.6 dB below the gain at 2fnyq/3. This is because although a PAM-4 signal includes the maximum transition between the lowest level and the highest level, the duobinary signal only includes the transitions between adjacent levels. That is why duobinary signaling has better immunity to crosstalk/reflection than does PAM-4, which is proportional to the maximum transition.

At each Nyquist frequency, when the channel loss difference between duobinary and PAM-2 is larger than 3.7 dB, duobinary eye height will be larger than that of PAM-2. In the same way, when the difference between duobinary and PAM-4 is less than 5.8 dB, duobinary eye height will be larger than that of PAM-4. When the difference is larger than 5.8 dB, on the other hand, the duobinary eye opening will be smaller than that of PAM-4.

Designers should note, however, that a lower roll-off factor value in the PAM-4 transfer function, which is caused by lower PAM-4 gain at a duobinary Nyquist frequency, results in horizontal eye closure. Specifically, we estimate duobinary eye height to be 3.8 dB larger than that for PAM-2, and 2.1 dB larger than that for PAM-4 in 12-Gbit/second signaling over a 75-centimeter trace on a low-e printed-circuit board.

The obtained duobinary signal in our design was sampled by four-way decision circuits, of which two circuits were used for data decisions and the others were used for clock recovery. In data decisions, duobinary signals are compared with reference voltages at the symbol rate and the comparison results are decoded into binary data. Compared with a conventional PAM-2 signaling system, we expect a moderate increase in design complexity because of the need for three additional components — an oversampled equalizer, a precoder and data decision circuits using reference voltages.

In adaptive equalization, error information based on a comparison of expected and actual amplitudes of equalized output is indispensable to the optimization of equalizer filter coefficients. In PAM-2/4, this requires a dedicated reference voltage and an additional comparator. In duobinary signaling, neither of these is required because the sampled transition edge value used by the clock recovery to extract input signal timing information can also be used to provide the needed error information.

Comparing the sampled edges of optimum and nonoptimum equalization helps explain this situation. When the sequence [0, 1, 1, 0] is transmitted in optimum duobinary equalization, the received sequence will be [0, 1, 2, 1, 0], which can be calculated by using superimposition of a single-bit response, [0, 1, 1, 0, 0] + [0, 0, 1, 1, 0]. Here we see the sampled edges of the received sequence are equal to the value 1, or differentially zero level. On the other hand, when the sequence is transmitted in a nonoptimum equalization that causes a single bit response with a larger Nyquist interval, [0, a, 1, 1, a, 0] ( 0 < a < 1), we obtain a received sequence, [0, 1+a, 2, 1+a, 0] which has a differentially nonzero value, 1+a at the sampled edge. This sampled edge value can serve as the error information needed to optimize the transmitter equalizer in an iteration procedure based on the Sign-Sign-LMS algorithm.

The single-bit responses of duobinary signals have their peak values at the intermediate point between symbol-rate sampling points. To achieve this kind of single-bit response, the waveform to be transmitted has to be filtered by means of oversampled equalization. Although in an ordinary FIR filter, oversampled equalization would require a doubling of the frequency of the filter's sampling clock, the multiphase clock in our system makes this unnecessary.

We developed a test chip containing a 12-Gbit/s 10-tap x2 oversampled equalizer using a 3-GHz, eight-phase clock. The equalizer itself consisted of two five-tap equalizers with shorted outputs used to transmit combined output through the channel. Each five-tap equalizer used a four-phase clock to multiplex one-fourth-rate parallel data from its tap controller. The clock phase difference between these equalizers was 45 degrees, which corresponds to a half-width of one symbol.

For high-speed operations, the clock recovery employed a conventional x2 oversampled method as is used in PAM-2. Unlike PAM-4, the duobinary signals have only one cross-point between symbols, which means that the circuitry required by PAM-4 to select sampled edges in order to assure accurate clock recovery was not needed here. In oversampled clock recovery, phase detection is performed by comparing the sampled value with respect to the center threshold at timing fc with the value at fd.

When a one-bit toggle data sequence is transmitted, however, a duobinary signal with small amplitude cannot be sampled correctly at fc, which means that clock recovery may not work at all. This problem can be overcome by using a data encoder that ensures a two-bit transition in the data sequence to be transmitted. Since two-bit transition eye height at fc will be roughly the same as that of a duobinary signal at fd, correct sampling can be achieved. We have confirmed that two-bit-transition-ensured 8B10B-like coding can be achieved by adding two bits to the input data.

Our duobinary test chip was fabricated in a 90-nanometer CMOS process with six levels of metal. It included the circuit components that are used to test transmitter equalization and clock recovery. Power consumption values are 133 milliwatts for the transmitter and 97 mW for the receiver. Circuit area is 0.18 mm2 (transmitter) and 0.055 mm2 (receiver).

In our tests over a 75-centimeter low-e pc-board trace, the eye diagram for PAM-2 signaling produced a 49 mV x 35-picosecond eye opening and indicated horizontal ISI caused by steep roll-off. The eye diagram for duobinary signaling showed a 73.5 mV x 52-ps opening that was 3.5 dB larger and 1.5 times wider than that for PAM-2.

In conclusion, we introduced duobinary signaling into chip-to-chip data transfers, allowing a controlled amount of ISI to reduce signaling bandwidth. In addition, this method offered better backward compatibility to PAM-2 and better crosstalk/reflection immunity against PAM-4. Since duobinary signaling provides these superior properties with only a moderate increase in design complexity, we believe this technology will find promising applications in next-generation serializer/deserializer components running at data rates greater than 10 Gbits/second.

References:

[1] Zerbe, J.L. et al., "Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell," IEEE J. Solid-State Circuits, Vol. 38, pages 2121 to 2130, December 2003.

[2] Lender, A., "The duobinary technique for high-speed data transmission," IEEE Trans. Commun. Electron., vol. 82, pages 214 tp 218, May 1963.

By Kouichi Yamguchi assistant manager and Muneo Fukaishi principal researcher, System Devices Research Laboratories, NEC Corp., Sagamihara, Kanagawa, Japan