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Designers talk about fitting cores
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EE Times


The best way to find out how real design teams are selecting and evaluating intellectual property is to ask them. That is precisely what EE Times intends to do in the IP Selection Industry Challenges program.

The first step in the research process has already been taken — a series of two focus groups gathering data about how engineers view the IP selection issue and what they are doing about it.

Data from these focus groups will be used to create a Web research questionnaire, from which we will gather global data on a larger number of design teams. This data will be reported in early December in another special section in EE Times and in a panel discussion at the IP/SoC Conference in Grenoble, France.

Early results from the focus groups are interesting in their own right. They confirm the intuitively obvious, underline the importance that engineers place on the selection problem and open up some surprising avenues for further exploration. We present a summary of the results here.

IP: Why bother?
A reasonable place to start with a study of IP selection is with the question of why engineers seek IP in the first place. The answer is supposed to be obvious — time and labor savings. But the obvious isn't always exactly how designers see the issue.

Participants in the focus groups were, for the most part, senior designers or chip architects with significant experience in the selection and integration of IP. The majority developed system-level ICs, using either an ASIC or customer-owned tooling (COT) flow, but a significant number targeted FPGAs for their design work. Interestingly, some of these engineers were ASIC designers by trade, but deteriorating market conditions had forced their organization to target FGPAs instead.

The amount of IP used in designs ranged widely: Some respondents reported that they used only a few peripheral interface blocks that made up about 10 percent of the design, while others said the reused content in many of their chips was upward of three-quarters of the die area.

The type of IP used also varied widely, from interfaces, I/O controllers and serializer/deserializer blocks to embedded SRAM, CPUs and specialized processing elements. One respondent commented on seeing an increase in the availability of general-purpose IP that could be targeted to any of a variety of applications.

There was general agreement on why a design team would decide to search for reusable IP. The most-cited reasons were meeting schedule with the available design team, focusing internal resources on the blocks that were critical to the market success of the product and reducing risk. This latter point caused some discussion, as one participant used the phrase "known-good IP" and others questioned whether there was such a thing. That debate would reappear throughout the focus groups.

Anticipating the problems
As a group of experienced IP users, the participants universally went into the IP selection process looking for problems — a surprisingly long list of problems. Roughly, the list could be split into business-related and technical issues.



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