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Some cores tougher to choose than others
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Now we come to the core of the study. How do design teams really go about selecting intellectual property? From our focus groups, we learned there was a considerable range of formality in the process. Some groups — notably those doing modest-size designs in FPGAs — used a very ad hoc process. Others had a much more formal IP evaluation process, not unlike the one used to qualify hardware components. In some cases, IP selection was regarded as a corporate function done by component-engineering and purchasing central staff, with the results offered to design teams for their use.

Based on data from our focus groups, we divided the selection process into six phases: identifying requirements, searching for IP, short-listing the candidates, detailed evaluation and verification, negotiation of terms and conditions, and, finally, the selection.

One of the first surprises came in ferreting out these ad hoc and formal selection processes in the survey data. We asked designers to rate the selection process for particular kinds of IP as easy or difficult. This in itself produced some interesting information.

The degree of difficulty respondents reported varied widely, depending on the kinds of IP blocks they needed. SRAM, flash memory and I/O blocks in general were rated as easy to acquire by more than 80 percent of the respondents. This is not to say that the blocks are simple — just that the combination of number of sources, constraints imposed by the target FPGA or foundry, and perhaps package limitations made the selection relatively straightforward.

At the other end of the spectrum, less-mature high-speed interface cores gave respondents the most trouble. Only 40 percent of respondents who selected PCI Express cores found the process easy, for example. For whatever reason — this would be worth further investigation — designers reported just about as much difficulty in selecting DSP cores.

But the surprise came in a later question. Assuming that an easy selection process would permit shortcuts, we asked respondents how many weeks they spent on each step in the six-step process. And although an "easy" selection category takes less time than a hard one, both processes allocate about the same percentage of time to each of the steps. It's just that when the choice is an easy one, each of those steps takes less time.

Evaluation, verification
According to the data, an average easy IP selection takes about 16 weeks and an average hard one, about 22. It's no surprise that detailed evaluation and verification of cores eat up the most time — about 40 percent of the total schedule. But establishing requirements takes most teams nearly as long.

The fastest step in the process is making a short list of the possible candidates. This may be as simple as discovering there is only one viable candidate, as some participants in the focus groups lamented. Or it may go quickly because corporate management or purchasing departments veto some potential vendors.

Negotiation takes time — almost a month, on average. But the average is misleading here. In many cases, new IP is acquired from a vendor with which the buyer already has a license agreement that may cover — or may be extended to cover — the new core. At the other extreme, there are cases when license negotiation is still going on during tapeout.

As a final step in the process, making the final decision and signing the papers is quick — a couple of weeks on the average. But this step is the culmination of a process that has consumed 16 to 22 weeks. And respondents reported that their average design altogether requires only 43 weeks. So on the average, the IP selection process is going on during half of the total design time. This, one presumes, makes for a mad rush to inspect and configure the newly licensed core, integrate it and verify the completed design before moving on to physical design and tapeout.



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