Choosing the Right Silicon Solution-Part 1
What are the key factors to consider when implementing your system design in a cell-based ASIC, a structured ASIC, an FPGA or when using another's application-specific standard product ICs? EE Times editor Ron Wilson helps lead the way through the maze of challenges you face when deciding which design approach to take.
From the articles below, read detailed case studies of design teams who have implemented system designs requiring highly integrated silicon solutions. Learn how to evaluate the business and technology trade-offs and see what drives the decision to choose one solution over another. Find out what support can you expect from your silicon supplier:
Seagate finds a middle path for ASIC development
One would think that the choice of an implementation technology for the mass storage industry would be a no-brainer.
Choosing the right silicon solution
Cell-based ASIC design-once clearly the best way to implement systems-on-chip-suddenly faces some tough competition from structured ASICs, FPGAs and highly integrated application-specific standard products.
Research sheds light on the decision process
In the world of theory, engineering decisions are based on technical requirements mapped into a set of technical specifications.
Each alternative offers trade-offs, intangibles
The design team implementing a system-level design has four basic options: a cell-based ASIC design-usually a system-on-chip; a structured ASIC design; one or more FPGAs; or a collection of standard-product ICs.
Assessing the structured-ASIC alternative
Cell-based ASIC design is often the best technical solution to a set of design requirements.
Trade-offs of designing with workhorse FPGAs
The field-programmable gate array might be the most misnamed device in the electronics repertoire.
Off-the-shelf moving to the head-of-the-line
Nearly every design uses standard-product ICs. But when the design requirements include greatly increased integration, performance and functionality, there has been a tendency to assume that the heart of the system will have to be a system-on-chip or a system-level FPGA.
Volatility spells programmability in networking
Startup Crescendo Networks saw an opportunity in termination of TCP networks with Layer 4/Layer 7 processing capabilities-an approach that could dramatically improve throughput on networks running, for example, Secure Sockets Layer communications into a bank of servers.
When requirements outrun an architecture
Design house eInfochips Ltd. does a significant level of contract design work, ranging from conventional design services to verification and functional intellectual property, at both the board and chip levels.
At F5 Networks, all strategies have a role
When it comes to selecting an implementation strategy for a new Internet Protocol traffic management box, F5 Networks has some huge advantages.
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