At least that's the way the story is told by those people who see Artisan's move as a crippling one for the design library industry. In fact, several of those same voices say that since that fateful moment — and Artisan's unilateral decision — reported revenues have fallen in the industry by as much as 50 percent, from over $150 million (and growing) in 1998 to current revenue estimates of well under $100 million. More importantly than the demise in the revenue, according to some however, is the diminution of the reputation of the industry in customers' eyes. Per Artisan's most outspoken critics, the fact that something can be had "for free,"immediately negates its commercial value even if its technical merits remains intact.

Foundation and empire

There's a different telling of the tale if Mark Templeton, president and CEO of Artisan, has the floor. In the fall of 1998, the company looked closely at the intellectual property (IP) vendors, those who were succeeding versus those who were not — companies such as ARM and MIPS. (At the time, he recalls his competition among design library vendors to include Compass, Avanti, Mentor Grahpics, Aspec, and Duet Technologies.) It seemed clear to Templeton and his team that the five or six library companies were, at best, serving a combined customer base of only 100 or so — in a time when there were upwards of 15,000 to 20,000 design teams in the world. Clearly, the library vendors were reaching only a small percentage of their potential market, so Artisan looked at the ASIC vendors and tried to understand why their business model was so successful. Templeton recalls, "LSI Logic, for example, was giving libraries to their customers. We knew that and [decided to follow] the classic ASIC model."

He says, in fact, there was no choice but for Artisan to change the model. Impacted by the presence of the emerging fabless semiconductor companies, as with so many sectors in the IC supply chain, Templeton says the quickening pace of change in process technologies meant that the customers were asking just how long a library could actually remain in use. The average life span of a library was dropping to a year or less and triggering the question: How much was anyone willing to pay for something that's only going to last a year? In Templteton's view, before the transition was made in the business model, there were a small number of customers who would pay $500,000 to $1 million for a library. There was adequate, though not spectacular, revenue off of a small customer base. However he says, since the introduction of their 'free library' model,

Artisan's business has exploded. According to Templeton, the company has happily had to beef up operations in the areas of distribution, license support, and product updating, as well as having to develop a fully web-enabled support system. End-user support now consumes a lot of resources compared to customer needs prior to the change.

Templeton addresses the sense that TSMC — a key foundry partner for Artisan — was caught by surprise by Artisan's move in 1998. "We adopted the model in advance of our relationship with TSMC." He also counters an industry sense that Artisan relies on their partnership with this one foundry for their success. "We work with a dozen [different] manufacturers. Yes, TSMC is important, but we also have product suites for UMC and Chartered, etc."

Was the library industry ever threatening to approach $200 million? Not according to Templeton. He says in the fall of 1998, industry revenues were still under $100 million. He argues that as a result of Artisan's decision, the company now has over 700 customers using their libraries. He does acknowledge however, "It's definitely deferred revenue, profits that come later [when the chip is in production]." He adds adamantly, "We're not in the EDA business. We're in the component business." The life cycle of that business model is straightforward for Templeton. "You invest. You design a product. You give out samples. You support those samples. Hopefully one of them goes to volume production and then you make money." Expressed in those terms, it's a challenge to find fault with his logic.

Templeton is willing to address the question of whether Artisan's decision has negatively impacted on the industry. He says candidly, "There's a lot of sour grapes out there." Comparing Artisan's recent history with that of Synopsys' domination in the synthesis market, he says, "No one has ever been able to compete with Design Compiler. [Similarly], people like our products — including all of our EDA vendors. We've created a standard for libraries. We're doing a great job." He feels that the competition doesn't fully understand the level of commitment needed for the business model that is fueling Artisan's growth. He says that an ad hoc adoption of the model, on a case-by-base basis, is never going to be as successful as Artisan's commitment to fully embrace this model for all customers. He believes that for many of his competitors, "it's tough to see [how the model works]. They've never deferred income [as Artisan has], so it's 'our fault' that they're not succeeding." He knows that there is a sense that Artisan is, perhaps, not succeeding either. However, he says the dramatic increase in library customers for Artisan since 1998 belies this rumor. "We believe there are well over 1000 products [that promise to contribute to the company's revenue stream in the coming years.]"

As compelling as argument as this may be for the royalty-licensing model, there's still an issue around how those licenses are tracked and revenue captured.

Templeton says, "There are lots of ways to track revenue. We have developed a tracking application, Artiscan, for our IP that we are now providing as open-source code to the Virtual Socket Interchange Alliance." Adding additional credibility to the tracking and collection of royalty revenue, he says, is the fact that several manufacturers and at least two competitors are using the same audit process that Artisan uses.

How are the various IP markets segmented?

A number of spokesmen distinguish "high-level IP" from "foundation IP" — standard cell, I/O, and memory. Templeton prefers the term "physical primitives" to articulate these distinctions for his customers. He says, more importantly, point-to-point competition is what defines the design library market, more than the semantics. "We have partnerships with EDA companies, but we are not an EDA company. And I don't see the melding of the library vendors and the tool vendors." The vendors who are providing tools for automated library generation, he says, aren't providing the high comfort levels and low risk required by the customer base.

He finishes by saying that he sees the physical primitives as the "transport layer" between gate-level design and design blocks at the level of design reuse. Systems on a chip (SOCs) will end up being "the forcing function that says [design reuse] has to happen." Without design reuse, he says there just won't be enough engineering bandwidth to take today's large designs to completion. Templeton says that, therefore, Artisan is an integral part of the design reuse supply chain.

He says, "A system chip is built out of blocks coming from somewhere else. It's built out of something you didn't design. So, we are partnering with several complex IP core providers since we are giving our libraries to them at no charge." Customers, he says, are looking for system-on-a-chip components from a number of different sources. They are paying for the volume of the eventual product. "Volume pricing is a good idea," he says and reiterates that this is the basis of the component-type thinking behind Artisan's business model. If a lot of systems sell, the customer and the component supplier make lots of money; if fewer systems sell, profits are similarly impacted, he says.

Technically speaking

Artisan having had its say, what is uppermost in the minds for the rest of the design library vendors? Callan Carpenter, president and CEO of Silicon Metrics, is an articulate spokesman for the industry. He answers the question — "What are design libraries?" — with ease.

"They've become an essential building block for integration. None are done from scratch these days. And standard cell libraries are the most common type of IP." However, in general, design libraries are considered by many to offer the following advantages: they speed up design, design productivity is increased, and more design automation and chip assembly is available.

Why then do most people, despite the kaffluffle over business models, consider design libraries to be boring? "Throughout most of the 1990's," Carpenter says, "These pieces of a design were considered to be like plumbing. You didn't think about it unless it failed. Whereas previously, libraries maxed-out at about 200 cells, in the .35-m design space and below, libraries are growing to have up to 1000 cells — sometimes even more. Additionally, timing, power, and electrical behavior have become complex problems to model. Therefore, the quality of the library is of even greater importance. So an interesting trend towards outsourcing of libraries has occurred."

It used to be that everyone built their own, he says, but now libraries are coming from companies like Artisan and Virtual Silicon Technology (VST), each of which, according to the sense 'on the street,' is tied to a specific foundry — TSMC and UMC respectively. Not only do these libraries have to come with a physical layout, but also with all the requisite model views. There are point tools coming out of Cadabra (now part of Numeritech) and Prolific, according to Carpenter, intended to address the need for physical layout, but companies like Silicon Metrics provide tools for the different model views: timing views, behavioral views (typically, VHDL for a vital model or Verilog for an SDF back-annotated file), test views, and logic-synthesis views.

He says, "There are 15 to 30 different files created for each cell of a 1,000 cell library. If I've got 1,000 of anything, that's a lot of data. Obviously, there are lots of opportunities for inconsistency or obsolete [information]. You can have some pretty broad accuracy issues with respect to the electrical behavior of that library. A lot of EDA energy has been put into automating those views, but the inconsistencies persist. [For instance,] a given cell's functional design in Verilog claims it's a NOR gate. However, a timing/synthesis model says it's a NAND gate. But after the chip is built and doesn't work, it's too late; the error's already embedded in the chip."

The designers want to catch the "dumb errors early on," according to Carpenter. Typically, engineers know through past experience that they've got issues with libraries, he says. They build guardbands and de-rate the performance around their designs. Additionally, he says that the cost of going from .35 m to .25 m to 18 m to .13 m is really huge — the process of "migrating" the designs. He says customers ask: "Wouldn't it be great if we could use our current libraries, rather than dealing with the transition?" And, he adds, there's an even greater problem plaguing the design houses. "In the old days, people only had to be building libraries for their own manufacturing facilities. Today, everybody has a second-source agreement with one or more of the foundries. Therefore, their designs must be portable to second-source manufacturing facilities. This is a direct outcome of the foundry model coming on-line in the last ten years."

Hence, the larger semiconductor companies have started to see a need for a more generic library type and for more flexible modeling. "Once I've got a basic sense for the timing or power numbers, I need to provide for different levels of precision and granularity of the models. Most companies approach the problem from a tool-centric perspective and only worry about form-fitting models after the fact. We took the opposite view. Most tools concentrate on the quality of the models they come with. We wanted to improve on that, rather than on the tools. Modeling and characterization doesn't necessarily impact on high-level algorithms of the tools. But different tools interpret differently under the hood, so there's a model consistency problem and an accuracy problem. If the models are not keeping up with the process technologies, we need to improve the models."

Carpenter says that the ambient temperature of the chip is important and needs to be reflected in models and libraries. The hotter a chip gets, the slower it runs. Most tools only allow the designer to put in one global number — although, in fact, there's actually a gradient of operating temperatures across the chip. Similar circuit structures in different parts of the chip will exhibit different behaviors. Also, the quantity of voltage is not the same in all corners of the chip. "There's IR drop across the power grid; the more current you pump in, the more voltage you get out. The difficult part will be to use different supply voltages. So you need to pick one global voltage." Carpenter's point: Far from boring, library creation is definitely not for the faint of heart.

Formerly known as library vendors

As reported, a number of library vendors have fled the industry. Synopsys is among them and has recently sold their library creation unit to Artisan. Company spokesman Kevin Kranen says the modeling of libraries had grown too far from the core business at Synopsys; it just didn't fit with the strategic business interests of the company. He says, however, Synopsys continues to maintain "a relationship with those guys [at Artisan]" in order to keep a hand in the industry. He acknowledges that Artisan did develop a somewhat radical new business model, but is not so adamant that they shrank the industry. "Over the long haul, we [ourselves] took in more money over time by creating a royalty model, especially through partners like UMC. Although, [Artisan's move] did remove some of the competition."

Have adjustments been required at Synopsys as a result of the sale to Artisan? From the localized perspective, Kranen believes the answer is no. "My team already had a relationship with the Artisan team. And, the fact that we're no longer in that business means that they don't see us as competition." Additionally, the foundries are now an integral part of the semiconductor supply chain, so Artisan and VST and Virage Logic are important for the support they provide to the foundries, he says.

On the technical side, Kranen reinforces Carpenter's point. "There is a whole new set of physical affects in the designs [emerging with deep-submicron designs]; how to accurately characterize these affects is a major problem. For instance, people are really having to learn how to characterize interconnects to enable physical synthesis. There are more than just linear affects as the voltage and temperature characteristics are becoming crucial." Given the business and technology volatility that has characterized the library market in the last several years, Kranen says that "there are only two guys that are really left standing in the market: Artisan and Virtual Silicon Technology. And, of course, for specialty memories, there's Virage. There's really nothing else out there."

Virtual competition

Taylor Scanlon, president and CEO of VST, might agree with Kranen, but might not necessarily like the situation, beneficial as it may be to his company. VST has been in business for a little over three years. They opened shop just prior to Artisan's dramatic rewrite of the standard business model in the library industry and, like everyone else, they were caught by surprise and have been in somewhat of a reactive mode ever since. Scanlon says VST was an early innovator in third-party libraries and contemplates, how do IP vendors show their contribution?

"The physics, the large cost of building fabs — over $1 billion a shot these days — has consolidated manufacturing. Nobody could have contemplated in the last 40 years of the semiconductor business these types of developments. The foundries arrived by necessity. I'm a former manufacturing guy and 10 years ago, if you had suggested that Motorola was going to embed their microprocessor in somebody else's' chip, they would have laughed." Clearly, the folks in the semiconductor food chain may not gather around the best crystal ball. Scanlon says that the business model is the important factor here."Since ARM was willing to embed their microprocessor, they ended up offering a formula for success."

"Technology is advancing rapidly. The business and legal issues are crucial, but it's well understood that there's a long fragmentation across the semiconductor business. Chip designers coming of of school can write Verilog or VHDL, but they have less and less knowledge of transistors. So, there's a bigger and bigger effort on helping the designer [at the transistor level]. Unfortunately, you can use a calculator without understanding the mathematics behind the calculations. But, the $200 billion semiconductor industry is so large now, it's hard to find anyone who understands the whole chain. The horizontal fragmentation and specialization is leading to the erroneous use of the term "dis-integration" with its negative implications. Instead, libraries have traditionally been a core technology in vertically integrated companies. Companies like LSI Logic and Motorola had great internal skill in producing design libraries. They didn't wake up one day and say, 'Let's not do this anymore.' The [third-party outsourcing of libraries] was forced on them by manufacturing realities." So now, Scanlon argues, there's a gap between the challenges of system-on-a-chip (SoC) design and manufacturing. The engineers need the guidance of EDA, IP vendors, and external design service providers to bridge the gap. The library industry is growing because it serves this purpose. "TSMC and UMC need the skills that we bring to bind them to the designers." The trend to library outsourcing is undeniable, he insists.

"There was a fall-out due to Artisan. It's not clear that TSMC knew in advance of the change [coming out of Artisan], but they agreed to pay royalties [once the change was announced]." The two moves caused considerable change in how people would charge for IP; there was a dramatic shift in how library vendors get paid for technology. "We were a one-year-old company and had just introduced a multi-foundry library when the market collapsed. It had a profound impact on how we did business," Scanlon says.

He adds, "Libraries lack in sex appeal as a topic not because they're a commodity — I object to that term — but because they're pervasive and ship in every single product [that comes off the line]. It's a extraordinary situation."

How does Scanlon address the perception that VST partners with UMC, Artisan with TSMC? "It's not a circumstance that any of the four parties wanted, but TSMC and UMC are competitive and there's tremendous pressure as a result. At the moment, there's a proliferation of interest [in library suppliers] and a concern about the shortage of library vendors. A lot of us are completely backlogged." He asks what would happen if a $2 billion fab is built without sufficient library support to bring those fabs online. "Very large companies come to us expecting they can get a quote for a $1 million library and are surprised to find that they can't do it. But there are only three principle players these days — Virage, VST, and Artisan."

"It's a shame there's a sense of reduced respect for library creation. It's just as hard to make a good standard cell today as always. The 'free library' model has caused a devaluation of the [library as a product]. But only time will tell if Artisan's move was brilliant or stupid. The notion of giving something away only works if it expands your market."

According to Scanlon, Artisan presently gets most of their revenue from the manufacturers and Virage from the chip OEMs. VST has a fifty-fifty split between the two. VST's business model includes foundry sponsorships and royalties to help foundries capture design wins.

According to Scanlon, there's good new and bad news in the library vendor industry. Good News: there are a broadening set of building blocks for customers and the IP industry has a valuation above EDA. He maintains that time-to-market advantages and quality customer support for design libraries are the important attributes that the library vendors continue to meet. Bad news: the business models are still under discussion.

Click here for this month's focus tables.