Clock Management with PLLs and DLLs
By Bob Kirk
Focus Report: Design Libraries
By Peggy Aycinena
Developing an Emulation Environment
By Cinda Flynn
SOCs and Embedded Reprogrammable Logic
By Yankin Tanurhan
ASIC Implementation in Programmable Logic
By Thomas Philbin
Ross Touts TSMC at ISQED 2001
By Peggy Aycinena
By Santa Clara, CA - March 28, 2001 - Ed Ross, president of TSMC, USA, detailed the full extent of his company's incursions into various sectors of the semiconductor supply chain in his plenary speech at ISQED 2001 on Tuesday.
Synopsys CTO Details Formal Verification at ISQED 2001
By Peggy Aycinena
By Santa Clara, CA - March 28, 2001 - In a tutorial-like mode, Raul Camposano, CTO and General Manager of Synopsys, Inc., presented a plenary talk at ISQED 2001 outlining the three principle types of formal verification techniques in use today in electronic design.
Feedback
Clock Management with PLLs and DLLs
By Bob Kirk
VSIA Showcases Online Compliance System
By Sean Patrick Dean
By Santa Clara, CA -- March 22, 2001 -- At the IP/SoC Conference, the Virtual Socket Interface Alliance (VSIA) highlighted the progress of its online Compliance System, which allows its virtual component (VC) members to create and view VSIA specification compliance reports for themselves and their customers.
EDA CEOs Address Challenges, Solutions
By Ron Wilson
By Munich, Germany - DATE Conference - March 15, 2001 - CEOs from three of the big four EDA tool vendors joined forces in a DATE panel here this afternoon to survey the emerging challenges — and possible solutions — in the industry's near future.
DATE Keynote Speaker Reports Frustration with EDA Industry
By Ron Wilson
By Munich, Germany - DATE Conference - Peter Bauer, executive vice president for sales and marketing for Infineon, presented the EDA industry with a not very veiled threat in his DATE keynote address here today.
Say It Aint So, Joe
By Peggy Aycinena
By IP/SoC Keynote Speaker, Joe Pumo, talks baseball and system-on-a-chip design.
ASICs and Foundries
By Sean Patrick Dean
IP Supply Chain
By George Janac, Trent Poltronetti, Aidan Herbert, and Daryl RuDusky
It's all in the Acronyms
By Red Wiebe
The New Testability Sins: Don't Atone, Avoid!
By L.T. Wang, Jaehee Lee, and Hsin-Po Wang
Editor's Notebook: ISQED Here to Stay
By Peggy Aycinena
By By focusing on the quality of electronic design, this highly technical conference offers a unique forum for discussion in Silicon Valley.
The New Testability Sins: Don't Atone, Avoid!
By L.T. Wang, Jaehee Lee, and Hsin-Po Wang
A Platform-based Design Approach for Configurable SOCs
By Steve Winegarden
Beauty and the Benchmark
By Peggy Aycinena
Monterey Merges with Aristo at the Party in Munich
By Peggy Aycinena
By It's always a good idea to have big news to announce at conferences; the press is ready and waiting to latch onto real stories — not just 'invented' news manufactured to get a company's name in print.
Formal Verification Moves Firmly into the Design Environment
By C. Michael Chang
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