A Verification Environment for an Embedded Processor
By Nick Heaton and Ed Flaherty

Timing and Power Analysis
By Peggy Aycinena

Hardware Considerations for Information Appliance Design
By William Dowell

Functionality Support in HDLs
By Larry Saunders and Yuri Tatarnikov

DAC to the Future
By Steven E. Schulz

Re-engineering the Art of Timing Sign-Off
By John Croix

Driving a 32-Bit RISC Processor in an FPGA
By Yanzhe Liu and Greg Kahlert

What is Full Custom Layout Design
By Dan Clein

A Verification Environment for an Embedded Processor
By Nick Heaton and Ed Flaherty

Verification at DAC 2001
By Jan M. Rabaey

A New DAC and a Starkly New World
By Ron Wilson

A New DAC and a Starkly New World
By Ron Wilson

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