Santa Cruz, Calif. — You'd think that after selling the autorouting company he co-founded to Cadence Design Systems Inc. for $420 million, John Cooper would be taking it easy. But Cooper is at it again, with a startup that he hopes will repeat the success of Cooper & Chyan Technology.

Cooper, whose work on pc-board autorouting goes back to the 1960s, has emerged from a comfortable semiretirement in Scottsdale, Ariz., to launch TeraRoute LLC, a startup that is developing a "shape-based," or gridless, autorouter for sub-100-nanometer IC designs. "We're going back to the drawing boards and starting over again with a different architecture, but again using shapes — without the large array required for a grid-based router," he said. "It's been fun, seeing if I can develop a new router that again pushes the envelope."

Cooper said that TeraRoute is working with four large chip-design companies, and is developing a platform that can handle "everything from standard-cell routing to chip assembly and memory routing." He said TeraRoute expects production-ready code by the first or second quarter of 2006.

The chief thing that's unique about the TeraRoute technology, he said, is the way in which it handles the internal data flow of the routing program. Cooper believes the new router will run faster and consume fewer memory resources than other routers, but as he acknowledges, "I've got to prove that."

Gary Smith, chief electronic-design automation analyst at Gartner Dataquest, said that design-for-manufacturing-aware routers are becoming important, but he questioned whether a shape-based approach will help with DFM. Pulsic Ltd., a U.K. startup, also offers a shape-based IC autorouter, he said.

Moreover, Cooper said, gridded routers will have problems with 65-nm design rules. These include proximity rules that might, for example, require the designer to vary wire width based on the proximity of other objects.

Dimensions are also critical. "If a shape is a little wide because of some electrical rule, then you need to increase the amount of space," Cooper said. "If you have a grid, and you're working with fixed spaces, then increasing something a little bit really increases the size of the grid. This can increase the size of the chip significantly."

TeraRoute supports advanced rules including configurable vias, wire extensions, shielding, width-based spacing, proximity spacing and tapering. The tool will take in data from signal-integrity analysis tools, but it's not running a signal-integrity analysis as it routes.