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9|28|2016 SAN JOSE, Calif. – Samsung researchers are working on a new approach to computing that could revamp data centers, said a corporate strategist. Separately, ...

9|27|2016 TORONTO—The MRAM market may actually start getting crowded in the next year or so, as another emerging player is looking to commercialize its technology, ...

9|27|2016 GRENOBLE, France — With the inexorable rise of apps and software driven by Google, Facebook and Apple, Silicon Valley has long since ceased to be about the ...

9|26|2016 LONDON—Malcolm Penn, the founder and CEO of Future Horizons Ltd. and usually one of the most bullish of chip market forecasters, thinks 2017 could be a ...

9|21|2016 PARIS — eSilicon was the first company in the industry to unveil its web-based tool available to SoC designers to browse and try IP before purchasing. That ...

9|21|2016 SAN JOSE, Calif. – A new startup will emerge from stealth mode and into the super-heated market for machine learning next week. Wave Computing will ...

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SteveD010
SteveD010 on Measuring Video Quality in Videoconferencing Systems
michigan0
Re: GaAs instead of Silicon Germanium: Sang Kim First, 28nm bulk is in volume manufacturing for several years by the major semiconductor companies but not 28nm FDSOI today yet. Why not? Simply because unlike 28nm bulk the LDD(Lightly Doped Drain) to minimize hot carrier generation can't be implemented in 28nm FDSOI. Furthermore, hot carrier reliability becomes worse with scaling, That is the major reason why 28nm FDSOI is not manufacturable today and will not be. Second, how can you suppress the leakage currents from such ultra short 7nm due to the short channel effects? How thin SOI thickness is required to prevent punch-through of un-dopped 7nm FDSOI? Possibly less than 4nm. Depositing such an ultra thin film less then 4nm filum uniformly and reliably over 12" wafers at the manufacturing line is extremely difficult or not even manufacturable. If not manufacturable, the 7nm FDSOI debate is over!Third, what happens when hot carriers are generated near the drain at normal operation of 7nm FDSOI? Electrons go to the positively biased drain with no harm but where the holes to go? The holes can't go to the substrate because of the thin BOX layer. Some holes may become trapped at the BOX layer causing Vt shift. However, the vast majority of holes drift through the the un-dopped SOI channel toward the N+Source,...
michigan0 on GF Debuts 7nm, Embedded MRAM
yoyoma0
yoyoma0 on EE Times Silicon 60: 2016's Emerging Companies to Watch
Opinion
When I look at the big signal, the first ever EDICON show in the U.S. (Boston, Sept. 20-22 2016) was flat. I kept looking for engineers from the major system ...
I recently read a book about the history of the Patapsco River, an important tributary in Maryland, and was struck by the slow pace of change over human history. A 17th ...
Until the 19th century -- let's say until the Napoleonic Wars -- life on earth proceeded at a slow pace with no significant differences over long periods of time. If you ...
Unless you're building a simple circuit with a few components on a breadboard, you're going to need a PCB. Let's face it, every electronic design has at least one. The ...
As we have predicted more than two years back, the industry is bifurcating, and just a few products pursue scaling to 7nm while the majority of designs stay on 28nm or ...
With regard to the recent analysis of Microsoft's MS-DOS and Digital Research's CP/M (see Was Microsoft built on stolen goods? by yours truly and Was DOS copied from CP/M? ...
As well its use in solid state electronics the various oxides of silicon are used as dielectrics in many applications where they are subject to high electric fields. A ...
Apple's new iPhone, due in September, won't be the dramatic refresh many hoped for, but it will include some much-needed upgrades. Here are some of the things we expect to ...

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