Re which consumes more power -- SRAM or FLASH -- that's an interesting one. If you take two devuces created at the same process node -- say 65nm, then the SRAM will consume more power. But the FLASH devices are typically 1 to 2 process nodes behind. So most Flash devuces today are at 65nm or higher, whil estate-of-the-art SRAM devuces are at 28nm. In this case, for the same number of gates, the SRAM will consume less power I think.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.