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Max The Magnificent
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Re: Part II. Understanding the Role of Hardware Description Languages (HDLs)
Max The Magnificent   12/11/2012 12:51:52 PM
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@lleiva: "the synthesis from C/C+ is effective in terms of time and area? "


The big advantage of HLS (sythesis from C/C ) is that it allows you to explore lots of different implementation options -- you can make something very area effcients (by resource sharing) but have lower performance, or use a lot of area (resources in FPGA terms) and have higher performance -- like all engineering it's a tradeoff




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