REGISTER | LOGIN
Breaking News
Comment
Bill T
User Rank
Author
Re: Part III. Design Tools and Methodologies
Bill T   12/12/2012 12:31:09 PM
NO RATINGS
Our SoC/ASIC is targeted at a high performance electromechanical storage device for highly cost-competitive markets. The design is fairly stable so there is no need for the experimentation which an FPGA would provide and the FPGA is too costly in performance and dollars to include in mass production. But our early prototypes did use FPGA's.



Most Recent Comments
resistion
 
EricOlsen
 
R_Colin_Johnson
 
Greg504
 
Shinobee
 
resistion
 
resistion
 
resistion
 
resistion
Like Us on Facebook