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Currently, I'm using my FPGA to develop the interface to a CCD imager...

Blogger

My first design tools were my hands, a pencil, and a drafting table, actually - this was back in 1986 or so.  Then I became a technician for a few years, and then went back to college to get a degree.

 

So, in 1994, I used my first FPGA.  We used ORCAD to draw our circuits, and then used another piece of software that would translate that netlist into a bitfile.

I've been heavy in analog circuitry, so I was actually using PSPICE at the same time.

Blogger

I'm using the Xilinx ISE WebPack.  I'm doing nothing FPGA-related for work, though.  I'm doing shenanigans for my own satisfaction, and trying to tie them to PCs and Analog circuitry.

 

I am using Opal Kelly boards:  http://www.opalkelly.com

 

Although, I'm also considering looking at some Digilent stuff...

Blogger

Lots of material in this one...

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very good presentation today.

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Things are coming together nicely.

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Security Electronics is the area I'm working in.

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Vivado is such an improvement over the last ISE.  Very impressive.

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PSpice was the first design tool I used.

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Video processing & distribution

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Viewlogic schematic capture

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Seems that Vivado does a very good SI and PI inside the FPGA device

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Considering working on FPGA design for home automation

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Xilinx and Altera and Active HDL tools

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tools from synopsys

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tools from cadence

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hello all from Edmonton, Alberta

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Thanks a lot Max; very informative lecture.

Regards from DR Congo

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Good lecture as usual.

Tomorrow...

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thanks for the session.

Be back tomorrow!

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Thank you Max.

Regards from germany

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1985 - 1986 not much familliarity with FPGA

till lately...

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Very good session, thanks Max

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First CAD use question,

First CAD use answer, Gerber printer/plotter files were used to make printed circuity prototypes.

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Brian -- now you're making me hungry

@AlanJayWeiner... you're making my stomach growl...

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@Brian Fuller2 - if we were all in the same room we'd have pizza and coffee

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Thanks lleiva -- c u tomorrow :-)

 

very useful session! Thanks a lot, Max

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Thanks Dave and H S and everyone fo ryour very kind words -- I look forward to seeing you all tomorrow

Had a great time.

Good night MAX and everyone.

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@lleiva: Do you think that all ED will move from HDL to HLS? The end of days for HDLs is coming soon? 

This is a tricky one. As I said in my talk, when we used to design a tth egate level and the more to RTL and Synthesis came along, a lot of designers resisted it. The ones who continued to resist are no longer designers. Now we have HLS -- there will always be a need for some amount of "hand-crafted design" at the RTL level (in the same way that we still used hand-crafted assembly language in some performance-critical software applications), but in the same way tha twriting programs in C is faster/easier than writing them in assembly, capturing designs at a high level and using HLS conveys a lot of advantages... I woudl say that most designers will be using a mix of HLS and RTL in just a coupel of years... 

Thanks Max! and goodnight all.

aburgin: Class suggestion: I've programmed in a dozen different languages, A great idea for a course would be a high level look at programming in C to create new generation FPGA's. I saw hins in the presntation, but it's only a snapshot... It looked fascinating

That's a good idea -- maybe we will do that in a future class. FYI, at Design West 2013 (next April) I will be hosting/moderating a free session titled "Learn 11 Computer Languages in 120 Minutes" where I give a 10 min intro then have 11 experts each talking for 10 mins about languages like C C+ SystemC SystemVerilog PSL, MyHDL...

@tomerb... no problem. I don't take it personally... the best part of this technology is engaging with you guys because (a) it's fun and (b) you make the course more than just a presentation... if we could all be in the same room, i think we'd have a blast. Thanks for joining in!

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For latest techniques for verification look at https://verificationacademy.com/ by MG

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Do you think that all ED will move from HDL to HLS? The end of days for HDLs is coming soon?  

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Thanks a lot Max !! Very informative session.

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 :

Check towards right of your screen ...EDUCATIONAL RESOURCES SPONSERD CONTENT

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@Brian. I hope you saw the wink ;) at the end of my whine about interruptions. It's a tough balance I'm sure. It's nice when you bring relevant stuff from the chat stream into the lecture, and when you keep the chat stream on track with Questions relevant to the lecture. Max's timing through the slides feels pretty good to me; it's just not a lot of time, but that's not a bad thing either. Thx to both of you.

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Naji: Where we can find good material to learn "VIVADO design suite"?

The Xilinx Website woudl be a good start

vyasa: Can you explain about the tesbench ? How its layered structure will be formed? Will it be taken care by the tool and the transactor?

Verification is a vast area in its own right. There are tools tha twill generate guided random sequences -- there are techniques using transaction level models to drive the abstract versions of the design and then coupl ethese with transactors to drive the lower-level representations of the design -- this truly is a vast area -- way to complex to go into here...

Where we can find good material to learn "VIVADO design suite"?

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Class suggestion: I've programmed in a dozen different languages, A great idea for a course would be a high level look at programming in C to create new generation FPGA's. I saw hins in the presntation, but it's only a snapshot... It looked fascinating

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@MAX : I just started using VIVADO...:)

 

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@H S: Can me tell more detail regarding the VIVADO design suite,.

It's incredible :-)

Can you explain about the tesbench ? How its layered structure will be formed? Will it be taken care by the tool and the transactor?

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gsbo: If I'm just starting out with Xilinx (zynq), which design tool should I learn?

Vivado, ISE or PlanAhead?

ISE is the previous generation -- but still widely in use. Vivady just came out -- PlanAhead is available with both -- in fact PlanAhead is the main "Cockpit" for Vivado -- personally if you are starting now I woudl say learn Vivado -- but then it depends on wha tdevices you are using -- if you are using FPGAs from a couple of generations ago you might be better off with ISE...

Hello MAX:

Can me tell more detail regarding the VIVADO design suite,.

Have been working with XILINX ISE ,

 

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Thanks! Answers:

1. First exp. with programming: Pascal

2. In 1985, I was coming to this planet

3. Current applications: Sound data acquisition, Signal processing 

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@BruceMcLaren Depends on what do you want to design.

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Do you think that all ED will move from HDL to HLS? 

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FPGA devt kits can be obtained from $500-$2000, check out the vendor websites for starters

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@H S SRIHARSHA, thanks!

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If we use a design tools based on C/C+ and on a Transaction Stream testbench are we capable to evaluate the peformance of different solutions ? If so, how ? Is a simulator provided by the design tool ?

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I am curious about your thoughts on Cesarr's very early question:

If I were to set up my own FPGA development Lab. What would be an optimun hardware setup. What all would I need to buy and how much $$$ would I have to spend

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@aburgin: Wow! ... things have really changed since I first touched programmable logic

Tell me about it -- make sure you come back tomorrow and Friday and I'll blow your socks off with what's happening out there

Is there any way to play with IP to prove out a design before you buy it ..... Try before you buy ????

 

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You are forced to specify you design at system level. There are some annoying restrictions but if you insist you can edit the compiled HDL code in Verilog or VHDL before synthesis.

Every new release of design tools is biger (needs 2 DVDs) and the installation also takes more and more disk space.

 

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@lleiva : It's a new and better Synthesizers

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BommersBlog: Get a cup for me!!!

If I'm just starting out with Xilinx (zynq), which design tool should I learn?

Vivado, ISE or PlanAhead?

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Max - you just need to multi-core yourself...

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Wow! ... things have really changed since I first touched programmable logic

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@Cristian: Isn't any way to limit the increase of the size of newer releases of design tools?

I'm not sure what you mean

Good lecture - going to review this with some fresh cofffee - -Thanks Max

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The Vivado brigns better solutions. This improvement is in the HLS Synthesis or in the synthiziser? 

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Just a beginner with FPGAs

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@ Dave callaghan : It's only at the top level abstraction .

 

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Thanks Oscar -- now I'm trying to catch up with all th ecomments and questions that have been posted -- I wish there were two of me :-)

Very informative session

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Isn't any way to limit the increase of the size of newer releases of design tools?

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If we use a design tools based on C/C+ and on a Transaction Stream testbench are we capable to evaluate the peformance of different solutions ? If so, how ? Is a simulator provided by the design tool ?

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Thank you Max for today's great presentation!

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Thanks Max, good presentation.

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Thanks Max and Brian.

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@moncho = Start doing now, as we hvae vivaldo released by XILINX

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muons are showing single event transients in the 20nm transistor

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Please tell in more detail regarding the slide 14.

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How robust is High level synthesis? Will it properly incorporate the timing issues ?

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i tried one compiler of C to VHDL, but without luck

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Using ise + simulink systemgenerator was able to solve the fixed point implementation of numbers

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anyone had used a compiler of C to VHDL?

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ISE of XILINX, because only had worked in the FPGA spartan

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System Generator for DSP

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What software do you currently use for FPGA designs that you couldn't live without??

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system c looks interesting, anyone using it?

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Our SoC/ASIC is targeted at a high performance electromechanical storage device for highly cost-competitive markets. The design is fairly stable so there is no need for the experimentation which an FPGA would provide and the FPGA is too costly in performance and dollars to include in mass production. But our early prototypes did use FPGA's.

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Sorry @Tomerb! Trying to strike a balance! Lips zipped for a while!

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Working with ISE 12.4 Virtex6

 

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Maybe the time goes quickly because Brian interrupts Max every slide transition. ;)

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the "interjections" are really distracting and annoying

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Working with ISE13.2 right now

 

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Do we need a different medium to design on? Is windows and the PC the right tool to power this technology?

CEO

web ise is free, how much is vivado?

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no plans for anything serious; just play with them for the fun of it

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Working with Altera Stratix IV

 

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I will be using FPGA's to replace obsolete components.

CEO

I would like to use a spartan 6 to interface to hdmi.

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I had worked with the sraptan 3an and 3e, th eunique difference are the resources

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FPGA for sig pxg, img pxg, comp vision.

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@ Ken@GDC :

Did you realize SOFTWARE DEFINED RADIO on FPGA? 

and if? which FPGA platform?

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trying to see where FPGA fit in the overall scope of things.

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Consulting - Consumer Electronics and Embedded Systems.

learning FPGA using spatan 3e ...

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My involvement is strictly associated with unit and system test of military equipment where FPGA's are used in most of the board designs.

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First computer language was FOCAL on a PDP-8, then assembly language on same.

 

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At work I use small fpga's (spartan 3e) to phase align clocks.

At home i use an avr core to as a fast (100Mhz) arduino.

 

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real rime image processing

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Video processing for broadcast signal processing and image compression

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Glue logic between new CPU and old hardware

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first language was fortran & assembler on an IBM 1130

was considered a large machine then, more like a moto 6800

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At this time I am trying to undrstand what as an amature I can use FPGA's for in the hobby small consumer field

CEO

Not using FPGAs currently

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Fast Fourier Transform

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Using spartan 3 board for control of power converter, the next proposed project is fotovoltaic generator

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@Brian Fuller2 - well, I do need to *test* them (ahem...) after fixing them...  Call of Duty II, anyone?   :)

 

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I am planning to teach beginners courses in FPGA, VHDL to professional engineers in industry

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good afternoon, everyone

 

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reaserch on video processing and communication bridges cores

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Software Defined Radios.

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applications: high speed test

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Please tell me about 3D IC = Xilinx Silicon interconnect technology.

Max

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My design goal is using the FPGA to model a simple CPU design prior to building the device outside of the FPGA

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None yet...need to get a good handle on where they fit first...that's why I'm here.

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Digital correlation for radio telescope arrays

Didn't know anything about FPGAs besides offloading complex algorithms from the general purpose microprocessor

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Optical Network Unit (ONU) control protocol in Passive Optical Networks (PONs)

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You might want to explain what you mean by "hard core" processor if you haven't already.

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One of the silicon debug tools I use daily has an FPGA, designed here but not by mysef.

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The 1st digital designs I did were in eith discrete or PAL's ....

 

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In 1985 I got my first 80186 based IBM clone PC called Redstone.

1st language was BASIC on a Radio Shack TRS-80 III, in 1980. Today am programming with C and Assembly for ARM-based devices. Have not personally worked with a hardware design language, but work very closely with people who do.

 

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@alanjayweiner... sounds like you're fixing every Xbox in the neighborhood! ;  )

 

Good man!

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I remember hearing about FPGAs when they came out, but never used them

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Used PALs, GALs, and PEELs to implement finite state machines and glue logic.

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Was not using them then.

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First tool: SPICE (Pspice)

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@Brian Fuller2 - I got annoyed when my son's Xbox broke and we had to pay to get it fixed.  I've got to buy a reflow machine soon...

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My designs aids were graph paper, but I am very old

CEO

CUPL, ABEL, and Microcap

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first "CAD" tool: my trusty old TI calculator!

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@alanjayweiner... hmmmm... 20 Xboxes... there's a story there!

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@Brian Fuller2 - sounds like a great place!  In comparison, my office is just filled with junk (and about 20 Xboxes I'm fixing...)

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Hi from germany, winter here also -15°C

 

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@AlanJayWeiner: His office is wild... it's like a circus storeroom!

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Mentor Graphics, then ProEngineer

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Orcado, PSIM, Autocad, simulink ...

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Of course you northern folks are thinking its winter now?

Enigma machine!?   Darn, all I've got is a slipstick...

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1st used Home Grown basic version of Spice

 

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Hello from NJ. First language was Assembly

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hello from Argentina!

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Durban has its best weather in "winter". Summer is hot wet and humid!

UPDATE yours navigator

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Greetings all from Needham, Massachusetts

 

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Hello everyone.I am ready.

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weather has settled down a bit. We've had a lot of rain!

Very hot day... 50 degrees

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@DAVE what time is it in Durban?

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Hello Everyone -- three minutes to go -- I'm just doing my warming up exercises (grin)

@Dave, how's the weather tonight?

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Good evening from Durban, South Africa.

Brazil! @Naji_ how's the weather...

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Good Evening from Debrecen. :)

 

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Hello everyone from Brazil

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Going live in five minutes, everyone!

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Good evening everyone from Crusty in Emsworth Hampshire England

CEO

@cesarr What would be the purpose of your "lab"?

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hi everybody from colombia

 

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Good morning from San Francisco, scattered showers and around 50 degrees... We'll kick off in about 25 minutes!

 

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Hello from Pasadena, Ca

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Good Morning from Rainy San Jose, CA.

It's 51°F now and a High of 53°F.

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Good Morning from Boston!

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If I were to set up my own FPGA development Lab. What would be an optimun hardware setup. What all would I need to buy and how much $$$ would I have to spend

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Max, I studied your slides and looked up all unfamiliar acronyms in the research engineering.

Looking good, keep up the good work! Rod. R.

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