One of the fallouts of such an event would be the monopolistic attitude that would be evident in their pricing structure. Absence of a competitive environment is detrimental to the user. This also would prevent the benefit to the user of some uniqueness present in each of the platforms when independantly managed tools are available.
Interesting summary, but I find humor in your not knowing that Mentor is the leader in SystemVerilog. And who did you speak to at Mentor? We have known for over a year that Questa leads SystemV support, even more than Synopsys, and that Cadence is well behind. And every Mentor employee I have ever spoken to in this area has known this and has sited examples and proof of this.
Mentor is #1 in Physical Verification, RET, DFT, Functional Verification, PCB, and ESL. They are strong (#2 or #3) in a number other categories like FPGA, Mixed Signal Simulation, etc. What is Cadence #1 in?
Maybe Mentor should buy Cadence and put some of Mentor's strong leadership in place to turn around the slipping gorilla.
Cadence does have great marketing though.
There are huge challenges to this proposed merger, and product overlap is a tremendous obstacle.
Both companies have SPICE simulators, Spectre vs ELDO.
Fast SPICE simulators: UltraSim vs ADiT.
Verilog simulation: NC-Sim vs ModelSim.
Mixed signal simulation: Incisive AMS vs ADVance MS.
Mentor legacy framework uses the Ample language, while newer tools use Tcl/Tk. Cadence uses Skill code.
This merger will look like Frankenstein to the existing users who will be forced to give up their familiar tools in order to learn new ones, not exactly productive.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.