"it will be possible to produce a 100-million ASIC gate emulator with 16 FPGAs for less than $50,000. This machine will run at approximately 10 MHz."
People sometimes forget what an emulator is for. It is not just to emulate the design. If you just want to run your chip then just build it. It will run faster than -any- emulator, and it is much easier to setup.
People want emulators to test and debug their designs--faster than is possible with simulators. It is not just how fast you can run the emulation, but how fast you can compile it, how quickly you can debug any problems, and then how fast you can re-compile it again after you find the fix.
If it takes days to compile, then hours or days of running for a bug to show itself, you can't afford the time to add probes, recompile and run again. Many non-FPGA based emulators compile multiple millions of gates in hours, and when running can record the state of every single node in a system around a trigger point. So when the bug occurs, you can don't have to add probes and re-run; you can trace the nets back to the problem and immediately see the waveforms.
If you think of it as a design debugger instead of an emulator there's a better chance you'll look for the right features that will get you to your finished working chip faster.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.