That 3D cost model I referred to was in May 2009 IEEE Trans Semi Manufacturing. It showed that monolithic 3D Flash, besides being inevitable, has an optimum in the number of added device layers. The great question that remains is: which 3D Flash alternative will prevail ?
Interesting work from Numonyx. I agree with "ECD Fan" - Samsung have already stacked both floating gate and TANOS versions of NAND using their epitaxial silicon growth technique. The floating gate version has the same scalability issues as 2D NAND while TANOS has read-pass disturb issues (among others). It will be interesting to see if Numonyx has solved the problems of integrating a high current carrying non-linear element (i.e. a stacked diode) with the PCM material. The question of cost in such approaches has been solved - see May's (2209) edition of IEEE Trans on Semi. Manufacturing. In any case, their approach as presented in the EE Times article sounds sort of similar to SanDisk's 3D approach (http://microlab.berkeley.edu/text/seminars/MonolithicMem.pdf).
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.