If I remember correctly, one of the major issues with the reduced features is the wafer yield due to bad cells in arrays. One way that was used (not sure if everyone does this now) was to provide redundant rows/arrays and at die test blow fuses to switch to good from bad arrays. The thing about DRAM technology was not just that it drove the process but it lead the way to maturing of the process due to the large volumes that DRAMs entailed. I look forward to the next leap in technology (what ever that is).
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.