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jg_
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re: What's Your Take on Tabula?
jg_   3/3/2010 2:33:39 AM
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There is plenty of spin, and 'patent dance' sounding talk, but the core idea seems to be 'multi threading' or time slice/serialize of the logic. That can save routing and LUTs but not save config memory and it will ADD the config-mux logic cost, between slice storage, and power impact. The real test will come down to the SW, and if it will do the 'slice and dice' needed on the code, and if that will be debug-able.

mcgrathdylan
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re: What's Your Take on Tabula?
mcgrathdylan   3/2/2010 11:00:22 PM
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Not exactly an outpouring of reaction so far. But perhaps you are just warming up. I'd love to hear from some readers on this.

ibiquity
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re: What's Your Take on Tabula?
ibiquity   3/2/2010 7:49:02 PM
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10 years ago there were reconfigurable FPGA's. Is there something fundamentally diffferent about these? I also question the phrase (spin?) "We don't ask customers to do anything fundamentally different than they've done before," Please define "Fundamentally Different". Just coding for configurabnility is fundamentally different.

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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