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SOY
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re: Memristor emulates neural learning
SOY   4/17/2010 9:52:37 AM
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Johnson-san, Hi, thank you for your valuable articles. I think this is one of reconfigurable computing approaches (or simply FPGA based computings, and or Adaptive Computing from DARPA). And curbon nano-wire based PLD (nanoPLD) researched by Prof. Andre DeHon and the memoristor based computing researched by hp have common scense or face to common direction. Difference between them is probably how many states held by memory element (cross-point, nano-wire may be only one bit, but memoristor may hold multi-bit). Xbar network is the key that behaves both of the memory and interconnect. I request you to report not only the structure (or architecture) but also application and HOW TO PROGRAM at initial state or HOW TO CONFIGURE at initial state. Currently FPGA support JTAG based programming, but it is no scense. And I think this is solution for application-specific computing that means application is statically mapped to the device and does not change to other application (does not make context-switch). Of course, forcing the switching is possible, but it breaks data flow on device, this means a cost involving extra time and space if switching is taken.

R_Colin_Johnson
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re: Memristor emulates neural learning
R_Colin_Johnson   4/16/2010 3:37:24 PM
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Memristors are just a part of the solution. IBM, Hewlett Packard, HRL and their university partners are all looking at these other issues too. Look for a flurry of results over the next 6 to 18 months.

SOY
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re: Memristor emulates neural learning
SOY   4/16/2010 11:53:31 AM
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>Memristors do not provide a solution for this problem. As mentioned in the article, crossbar behaves as interconnection network, and its crosspoint is the synapse-like element.

Mapou
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re: Memristor emulates neural learning
Mapou   4/16/2010 4:02:20 AM
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Interesting. However, even though simulating a synapse or a neuron is nice but what is even more important is the ability to physically link those neurons to hundreds or thousands of other neurons in the network. Oftentimes, the neurons can be very distant. Memristors do not provide a solution for this problem. * Also, synaptic learning in the sensory cortex is not based on the concurrency of the spikes but on afferent signals arriving about 10 milliseconds before the post-synaptic action potential. See the work of Henry Markram for more on this.



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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