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selinz
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re: TI pushes pillar flip-chip for next-gen ICs
selinz   7/16/2010 12:34:25 AM
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Don't confuse the IC bump pitch with the package bump pitch. Current production IC's are often in the 150 to 250 micron pitch range, while it sounds like this will be closer to 50 microns! That's going to really challenge probe cards, since even 80 micron area array is tough to pull off these days. Often the package can be used as the space transformer for the probe head. Tricky stuff though... Of course this works for 1 up.. Multi-up represents a new challenge. Finally, they haven't talked about the substrate, which is really the enabler. Finer pitch probably means no solder mask, Sn cap, and 1 or 2 mil traces.. Cool stuff. There aren't that many places that can pull that off.

georgegrimes
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Rookie
re: TI pushes pillar flip-chip for next-gen ICs
georgegrimes   7/8/2010 2:10:09 PM
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How does one shrink something 300%? After you shrink it 100% it is zero in size.

Duane Benson
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re: TI pushes pillar flip-chip for next-gen ICs
Duane Benson   7/7/2010 5:56:41 PM
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I'd like to hear a bit more about this in terms of the practical use of the parts. It's interesting in terms of cost savings and performance improvements but the use of the part is an important consideration too. Ti's OMAP processor ends up on a 0.4mm pitch BGA package. That means tighter space and trace limits for the PCB layout as well as vias in the BGA land pads (please fill and plate the vias in the pads). Expect to see this leading to even smaller pitches on the components. I haven't yet seen a 0.3mm pitch part I have heard that they are on the way.



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