IM and Tosiba/Sandisk have been trying to extend floating gate forever. CTF is complicated, requires engineering of the band structure of the trapping layer and trades off the retention vs window. Samsung introduced TANOS but maybe they'll give it up?
I believe Spansion and Elpida can be really successful if they move away from Mirror-bit and use F-N tunneling for program-erase like the FG-NAND guys do (and then do 3D NAND flash).
The reason for my optimism is this:
- Charge trapping is indeed a viable path for giving lower cost per bit for NAND, mainly because it enables complex 3D NAND architectures.
- It is, however, a very tough technology to master and manufacture. Spansion has done great work actually building products with charge trap technology (albeit for NOR). This needed careful optimization of dielectrics and reliability. All this knowledge will be invaluable for 3D NAND.
- While the standard NAND IP space is heavily saturated, 3D NAND IP is still up for grabs. If Spansion and Elpida focus on 3D NAND with charge trap technology, their existing know-how on charge trapping will enable them to compete with and have an advantage over today's NAND manufacturers in that exciting new area.
Elpida and Spansion are talking of charge trap technology which is pretty new for the NAND supplier. current NAND suppliers are on the floating gate which has difficulty scaling beyond 25nm. I see this as a good move if executed well and products come to the market fast.
NAND Flash has always been used in the consumer market and there's no use making an older technology device in this market. Only for industrial & military applications where the lifespan of a product is 10 years or more, it makes sense to continue to make older tech devices. Also, NAND inclusion in computers can never slow down DRAM growth - unless NAND flash supports 'in-place execute' which it does not.
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