I am one of those who are passionate about verification. I'm nearly always disappointed to see that the exciting new verification tools only work with 100% digital ICs.
Iíve always worked with mixed signal SOCs with digital circuitry in the analog feedback loop. Placing such digital circuitry in a black box with the analog circuitry allows one to use digital verification tools but leaves holes in the verification plan. Here are some mixed-signal building blocks with high-risk digital content. In particular, Iím talking about analog front-end sub-circuits with digital controls that are generated by signal processing the output of the A/D converter. For example:
* Automatic Gain Control
* Digital PLL (discrete incremental control over sampling frequency and phase)
* Adaptive Analog Filters
* Built-in Analog Self-Test
* Automatic Calibration and Offset Cancelation
A workaround is to create a "real" testbench to verify the mixed-signal SOC. In addition, create a "spoof" testbench which quarantines the mixed-signal content to make the SOC look like a 100% digital IC.
The real testbench includes assertions for verifying power-up sequencing, bias currents, reference voltages and the validity of digital controls. It also assigns variables such as gain, frequency, phase or other analog quantities versus time, for which assertions are written.
I haven't found a way to objectively measure and quantify the completeness of mixed-signal verification -- with or without assertions. I long for the day when verification tools are written to assist the mixed-signal verification engineer with the real SOC testbench.
I welcome further comments about mixed-signal verification. Has anyone found solutions to the problems I've described?
Contact me via my web page or LinkedIn profile if you have questions of your own, or need help with RF, Analog and mixed-signal SOC verification.
R. Peruzzi Consulting, Inc.
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