noise problem? The phase noise seems a little lower than in other types of CMOS oscillators and should be much lower at the frequencies at which it is user configurable.
I'm also pretty sure it will have an option of being separately packaged, since wire bonding is also used for linking silicon to the package. That's my 2 cents anyway.
Very nice solution. I guess with the noise problems, it will never be integrated onto the ASIC. Can it be used in a separate package in the system or does it have to be packaged with the ASIC to avoid stray capacitance and ground loop issues?
Blog Doing Math in FPGAs Tom Burke 21 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...