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old account Frank Eory
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re: Will IP use increase in forthcoming SoC design?
old account Frank Eory   11/5/2010 10:39:45 PM
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Excellent article Piyush, and I agree with each of your four key reasons why IP re-use is often such a nightmare. To your 4th point about re-using IP blocks from a previous generation design, I would add that even when an IP block is carefully designed for re-use, such re-use is still often a nightmare because it often becomes "re-use with changes" -- meaning that what was perfect for the previous generation is not quite perfect for the new SoC, and the IP block will need some feature or performance enhancement, even if that is limited only to "use less power." Also, you're spot-on with your comment about consumer electronics and "Christmas does only come once a year." The cycle from CES in early January to production-ready by mid-summer is brutally rigid, and it is sometimes difficult for engineers to understand why being a few weeks late on a schedule might actually mean being a whole year late! The CE cycle does not bend to accommodate schedule slips, and this also adds another element of risk to the question of IP re-use and especially "re-use with changes."

DrFPGA
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re: Will IP use increase in forthcoming SoC design?
DrFPGA   11/5/2010 7:12:35 PM
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The IP trend seems to be toward the big CAE guys supplying more and more of it and customers will find it works great in their tool environments. The days of the 'little guy' IP supplier are numbered. One stop shopping, bundles and CAE supplier momentum are going to win the day. Quality will be better and customers will benefit- but prices will be higher...



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