@dnenni: There is a good possibility that your pick #6 may end up becoming an expensive shot for Intel! I don't know if Intel has aligned the ecosystem partners (eg., OSATs) in this model or left it up to Achronix (& other likely businesses coming its way) to manage it. Achronix may find some cost advantages with other established foundries like TSMC (& even Global Foundries) who have partnerships in probing, packaging and final test vendors.
My previous experience as a wafer probing test hardware developer in the Intel ecosystem was not a pleasant one. I imagine Intel facing difficulties in signing up ecosystem partners for its foundry business model since many of them have been burned by it in the past.
I've predicted foundry as part of Intel's five year plan for two years. Its early and don’t see it as a volume thing quite yet. Intel financial production strategy is based on exponential volumes over time. Obviously it takes product volume to reach capacity with ever finer process dimensions. Capacity in step with margin requirement and the depreciation schedule. FPGA to me means configurable and that means prototype and/or network communications. And oh boy would Nvidia and VIA love to sell raw die into an open cavity in an Intel package. My bet is that Intel is enabling certain design teams, probably a small number, with its process rules. And that their designs will end up as blocks in Intel SOCs. The key to becoming a design slave in this environment is what Intel does not have. Power management for one. And then remember to tell the Intel lawyer when asked what else the design is capable of, that the design is only capable of what Intel has specified. Watch out for your IP. Mike Bruzzone , Camp Marketing.
I don't feel I have any insight on this topic Mark (and I feel similarly about most of what I've seen in reports and comments to this point in time). From an Intel spokesperson it's been reportedly stated that Intel is open to adding other customers beyond Achronix but that does not add much clarity for me personally. I do find the choice of Achronix as a REALLY cool one, as it seems unique in its approach to FPGA design and would seem to allow for very broad adoption of associated IP into numerous markets. Also, I've seen the following in a couple of places (sources available on request) and I am personally intrigued by the potential of comparative power efficiency: "Taking advantage of the performance and power savings of Intel’s 22nm process technology, [the Achronix] Speedster22i will also extend the boundaries of FPGA speed and power efficiency, enabling as much as 300% higher performance, 50% lower power, and 40% lower cost than any other FPGA in any other process technology."
Design and manufacturing have now become completely coupled. The innovation and the yield are in the interaction between the two. Litho being the wildest card and process the vehicle, the foundry is the stage. What worked for AMD can work for Intel and first you try it on a lower profile...
The case for Intel foundary business was much stronger a decade ago when Intel fab process was a generation ahead of the competitors.
Recall that Intel had started a foundary business around 1999-2000. Then the scope included backend/physical design services. Strangely it did not restrict service to Intel fabs and offered to liason other foundaries too.
Entry to the foundary business is harder now. But so is the disperation of Intel to diversify in areas other than the core PC business.
Not too long ago Intel was going to use TSMC to enter SOC/embedded business.
I think Intel is throwing darts everywhere hoping to stick somewhere. Very bad strategy.
Intel is probably fabbing devices for customers who have government contracts which require ASICs to be foundried in the US -- as long as the ICs don't compete with Intel business units. I am sure price is not the primary consideration for these customers. There really are no other alternatives. IBM is hard to deal with and slow, and TI doesn't offer foundry services below 65nm.
A Book For All Reasons Bernard Cole1 Comment Robert Oshana's recent book "Software Engineering for Embedded Systems (Newnes/Elsevier)," written and edited with Mark Kraeling, is a 'book for all reasons.' At almost 1,200 pages, it ...