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old account Frank Eory
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re: The case for stand-alone reset timers in mobile devices
old account Frank Eory   12/22/2010 8:08:18 PM
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Doesn't every PMIC include a robust, software-proof watchdog timer reset function? Do some mobile handset designers really allocate PCB space for a separate watchdog IC? Why?

Forma
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re: The case for stand-alone reset timers in mobile devices
Forma   12/22/2010 5:04:36 PM
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The concept isn't new - there are already reset/watchdog ic chips often used in such designs. They allow communication with the Application processor to set-up a timer, whilst also providing protection for the SoC by holding the reset until the power is stable. It's know for years so above sounds more like a reminder than 'innovation'..

Andrewier
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re: The case for stand-alone reset timers in mobile devices
Andrewier   12/21/2010 12:57:20 AM
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Ahnnnn... A real (I mean not software) switch, anyone? After some really strong design and debuging, of course.

Code Monkey
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re: The case for stand-alone reset timers in mobile devices
Code Monkey   12/20/2010 4:28:57 PM
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The last handheld device I worked on had an FPGA. Software was expected to detect the "power" button after 3 seconds to provide the usual graceful shutdown, but for safety we put in logic to shut off power if the user holds down the button for more than 5 seconds. It's hard to imagine phone designers leaving out such a failsafe feature. Especially since Microsoft has conditioned users to expect a "reset button".

sharps_eng
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re: The case for stand-alone reset timers in mobile devices
sharps_eng   12/11/2010 11:17:06 PM
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I always scroll to the last page to check the writer's byline: ahah, its a Fairchild guy selling chips. Fair enough, but some of his fixit examples are just fixing terribly bad design in the original smartphones, ie the white screen of death; having to remove the battery... seems they never learn. I hereby declare that my preference is for a separate watchdog device, but I'd use an on-chip device provided it was independent of everything except the power rails. (I am assuming we are not talking about hi-rel devices here by the way.)



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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